Testing PCIe on Armada 370 (or older) in U-Boot

Pali Rohár pali at kernel.org
Fri Nov 5 09:48:24 CET 2021


On Friday 05 November 2021 07:08:34 Stefan Roese wrote:
> Hi Pali,
> 
> On 04.11.21 16:49, Pali Rohár wrote:
> > Hello! Recently I have sent more PCIe related patches for mvebu/armada
> > SoCs into U-Boot. Now all were merged into U-Boot git master branch.
> > I have tested everything on Armada 38x.
> > 
> > I would like to ask if you have some Armada 370 board (or older, e.g.
> > Dove, Kirwood, Discovery, Orion) and if you could test if PCIe cards are
> > correctly detected in recent U-Boot from git master branch.
> > 
> > Just calling 'pci 0', 'pci 1', 'pci 2', ... commands and checking output
> > if all connected cards are printed should be enough.
> > 
> > On older boards, I would be interested in what is reported in PCI config
> > space of PCIe Root Port. U-Boot from git master branch now exports the
> > first PCIe Root Port at BDF address 0.0.0, so config space can be dumped
> > by U-Boot command 'pci display.b 0.0.0 0 200'.
> 
> Here my tests on the Armada XP theadorable board:
> 
> => pci 0
> Scanning PCI devices on bus 0
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 00.00.00   0x11ab     0x7826     Bridge device           0x04
> => pci 1
> Scanning PCI devices on bus 1
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 01.00.00   0x8086     0x0082     Network controller      0x80
> => pci 2
> Scanning PCI devices on bus 2
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 02.00.00   0x11ab     0x7826     Bridge device           0x04
> => pci 3
> Scanning PCI devices on bus 3
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 03.00.00   0x10b5     0x8619     Bridge device           0x04
> 03.00.01   0x10b5     0x8619     Base system peripheral  0x80
> => pci 4
> Scanning PCI devices on bus 4
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 04.01.00   0x10b5     0x8619     Bridge device           0x04
> 04.02.00   0x10b5     0x8619     Bridge device           0x04
> 04.03.00   0x10b5     0x8619     Bridge device           0x04
> => pci 5
> Scanning PCI devices on bus 5
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> => pci 6
> Scanning PCI devices on bus 6
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 06.00.00   0x1b4b     0x9182     Mass storage controller 0x06
> => pci 7
> Scanning PCI devices on bus 7
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> => pci display.b 0.0.0 0 200
> 00000000: ab 11 26 78 07 00 10 00 02 00 04 06 00 00 01 00
> 00000010: 00 00 00 00 00 00 00 00 00 01 01 00 01 f1 00 00
> 00000020: 00 c0 00 c0 01 10 01 00 00 00 00 00 00 00 00 00
> 00000030: 10 f1 0f f1 40 00 00 00 00 00 00 00 00 01 00 00
> 00000040: 01 50 03 06 00 00 00 00 00 00 00 00 00 00 00 00
> 00000050: 05 60 80 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000060: 10 00 42 00 80 80 00 00 00 20 00 00 11 ac 07 00
> 00000070: 40 00 11 10 00 00 00 00 00 00 40 00 00 00 00 00
> 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000090: 42 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000100: 01 00 01 00 00 00 00 00 00 00 00 00 10 00 06 00
> 00000110: 00 00 00 00 00 20 00 00 00 00 00 00 01 00 00 4a
> 00000120: 04 00 00 01 00 01 08 01 02 80 00 34 00 00 00 00
> 00000130: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000140: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000150: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000160: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000170: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000180: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 00000190: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000001a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000001b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000001c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000001d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000001e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 000001f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
> 
> Looks much better now AFAICT upon a quick glance.

Perfect! Now it can access also "Mass storage controller" (which is
probably USB controller) which is connected behind the PCIe switch.

> Here the output from an older U-Boot version on this board (2021.01):
> 
> => pci 0
> Scanning PCI devices on bus 0
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 00.01.00   0x8086     0x0082     Network controller      0x80
> => pci 1
> Scanning PCI devices on bus 1
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> 01.01.00   0x10b5     0x8619     Bridge device           0x04
> 01.01.01   0x10b5     0x8619     Base system peripheral  0x80
> => pci 2
> Scanning PCI devices on bus 2
> BusDevFun  VendorId   DeviceId   Device Class       Sub-Class
> _____________________________________________________________
> => pci 3
> No such bus
> => pci 4
> No such bus
> => pci 5
> No such bus
> => pci 6
> No such bus
> => pci 7
> No such bus
> => pci 8
> No such bus
> => pci 9
> No such bus
> 
> 
> Thanks,
> Stefan


More information about the U-Boot mailing list