[PATCH 20/20] Convert CONFIG_LAST_STAGE_INIT to Kconfig

Tom Rini trini at konsulko.com
Mon Nov 8 04:59:51 CET 2021


This converts the following to Kconfig:
   CONFIG_LAST_STAGE_INIT

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 configs/cortina_presidio-asic-base_defconfig  | 1 +
 configs/cortina_presidio-asic-emmc_defconfig  | 1 +
 configs/cortina_presidio-asic-pnand_defconfig | 1 +
 configs/octeontx2_95xx_defconfig              | 1 +
 configs/octeontx2_96xx_defconfig              | 1 +
 include/configs/octeontx2_common.h            | 2 --
 include/configs/presidio_asic.h               | 3 ---
 7 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig
index 947cfa223392..426c3388b3ca 100644
--- a/configs/cortina_presidio-asic-base_defconfig
+++ b/configs/cortina_presidio-asic-base_defconfig
@@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="earlycon=serial,0xf4329148 console=ttyS0,115200 root=/dev/ram0"
 CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
 CONFIG_SYS_PROMPT="G3#"
 CONFIG_CMD_WDT=y
 CONFIG_CMD_CACHE=y
diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig
index 9d5921a95370..a96e251dc52e 100644
--- a/configs/cortina_presidio-asic-emmc_defconfig
+++ b/configs/cortina_presidio-asic-emmc_defconfig
@@ -12,6 +12,7 @@ CONFIG_SYS_LOAD_ADDR=0x10000000
 CONFIG_SHOW_BOOT_PROGRESS=y
 CONFIG_BOOTDELAY=3
 CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
 CONFIG_SYS_PROMPT="G3#"
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig
index eb15b379af73..86947507efd5 100644
--- a/configs/cortina_presidio-asic-pnand_defconfig
+++ b/configs/cortina_presidio-asic-pnand_defconfig
@@ -14,6 +14,7 @@ CONFIG_BOOTDELAY=3
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="earlycon=serial,0xf4329148 console=ttyS0,115200 root=/dev/ram0"
 CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
 CONFIG_SYS_PROMPT="G3#"
 CONFIG_CMD_MTD=y
 CONFIG_CMD_WDT=y
diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig
index de5ce1cb28b1..e1b86a5a8b69 100644
--- a/configs/octeontx2_95xx_defconfig
+++ b/configs/octeontx2_95xx_defconfig
@@ -24,6 +24,7 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=6 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Marvell> "
 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig
index 011bc796ab43..ec03d959771b 100644
--- a/configs/octeontx2_96xx_defconfig
+++ b/configs/octeontx2_96xx_defconfig
@@ -24,6 +24,7 @@ CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="Marvell> "
 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h
index 6f3e2cae937c..bc21b795cf6b 100644
--- a/include/configs/octeontx2_common.h
+++ b/include/configs/octeontx2_common.h
@@ -18,8 +18,6 @@
 /** Stack starting address */
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0xffff0)
 
-#define CONFIG_LAST_STAGE_INIT
-
 /* Autoboot options */
 #define CONFIG_RESET_TO_RETRY
 #define CONFIG_BOOT_RETRY_TIME		-1
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h
index 8d689d9e4be1..3df51437ca24 100644
--- a/include/configs/presidio_asic.h
+++ b/include/configs/presidio_asic.h
@@ -43,9 +43,6 @@
 /* BOOTP options */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-/* Miscellaneous configurable options */
-#define CONFIG_LAST_STAGE_INIT
-
 /* SDRAM Bank #1 */
 #define DDR_BASE			0x00000000
 #define PHYS_SDRAM_1			DDR_BASE
-- 
2.25.1



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