[PATCH 5/8] ARM: dts: stm32: Use lower-case hex for address for stm32f469-disco-u-boot.dtsi

[Patrice Chotard]

Replace upper-case hex with lower-case hex for address.

Signed-off-by: Patrice Chotard <patrice.chotard at foss.st.com>
---

 arch/arm/dts/stm32f469-disco-u-boot.dtsi | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/arm/dts/stm32f469-disco-u-boot.dtsi b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
index 9eda8f535b..cd173623ef 100644
--- a/arch/arm/dts/stm32f469-disco-u-boot.dtsi
+++ b/arch/arm/dts/stm32f469-disco-u-boot.dtsi
@@ -34,7 +34,7 @@
 
 		fmc: fmc at A0000000 {
 			compatible = "st,stm32-fmc";
-			reg = <0xA0000000 0x1000>;
+			reg = <0xa0000000 0x1000>;
 			clocks = <&rcc 0 STM32F4_AHB3_CLOCK(FMC)>;
 			st,syscfg = <&syscfg>;
 			pinctrl-0 = <&fmc_pins_d32>;
@@ -70,7 +70,7 @@
 			compatible = "st,stm32f469-qspi";
 			#address-cells = <1>;
 			#size-cells = <0>;
-			reg = <0xA0001000 0x1000>, <0x90000000 0x10000000>;
+			reg = <0xa0001000 0x1000>, <0x90000000 0x10000000>;
 			reg-names = "qspi", "qspi_mm";
 			interrupts = <91>;
 			spi-max-frequency = <108000000>;
@@ -236,7 +236,7 @@
 };
 
 &qspi {
-	reg = <0xA0001000 0x1000>, <0x90000000 0x1000000>;
+	reg = <0xa0001000 0x1000>, <0x90000000 0x1000000>;
 	flash0: n25q128a at 0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
2.17.1