[PATCH 2/2] arm64: zynqmp: Remove clock-names from GEM in zynqmp-clk-ccf.dtsi
Michal Simek
michal.simek at xilinx.com
Thu Nov 18 13:42:28 CET 2021
Remove clock-names from GEM nodes from clk-ccf because they should be only
present in zynqmp.dtsi. And as is visible both clock-names defined didn't
really match.
Signed-off-by: Michal Simek <michal.simek at xilinx.com>
---
arch/arm/dts/zynqmp-clk-ccf.dtsi | 4 ----
arch/arm/dts/zynqmp.dtsi | 8 ++++----
2 files changed, 4 insertions(+), 8 deletions(-)
diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index b27b0aaf7c9b..664e65896d7e 100644
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -169,28 +169,24 @@
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>,
<&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>,
<&zynqmp_clk GEM_TSU>;
- clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem1 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
<&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
<&zynqmp_clk GEM_TSU>;
- clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem2 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>,
<&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>,
<&zynqmp_clk GEM_TSU>;
- clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gem3 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>,
<&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>,
<&zynqmp_clk GEM_TSU>;
- clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
};
&gpio {
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 2264a80e3312..015a582d7a79 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -527,7 +527,7 @@
interrupt-parent = <&gic>;
interrupts = <0 57 4>, <0 57 4>;
reg = <0x0 0xff0b0000 0x0 0x1000>;
- clock-names = "pclk", "hclk", "tx_clk";
+ clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
@@ -542,7 +542,7 @@
interrupt-parent = <&gic>;
interrupts = <0 59 4>, <0 59 4>;
reg = <0x0 0xff0c0000 0x0 0x1000>;
- clock-names = "pclk", "hclk", "tx_clk";
+ clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
@@ -557,7 +557,7 @@
interrupt-parent = <&gic>;
interrupts = <0 61 4>, <0 61 4>;
reg = <0x0 0xff0d0000 0x0 0x1000>;
- clock-names = "pclk", "hclk", "tx_clk";
+ clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
@@ -572,7 +572,7 @@
interrupt-parent = <&gic>;
interrupts = <0 63 4>, <0 63 4>;
reg = <0x0 0xff0e0000 0x0 0x1000>;
- clock-names = "pclk", "hclk", "tx_clk";
+ clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
--
2.33.1
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