[PATCH v2 1/2] riscv: Support booting SiFive Unmatched from SPI.
Sean Anderson
seanga2 at gmail.com
Wed Nov 24 05:39:53 CET 2021
On 11/23/21 11:27 PM, Thomas Skibo wrote:
> Configure SPI flash devices into SPL. Add SPI boot option to spl.c.
> Document how to format flash for booting.
>
> Signed-off-by: Thomas Skibo <thomas-git at skibo.net>
> ---
> .../dts/hifive-unmatched-a00-u-boot.dtsi | 11 +++++++
> board/sifive/unmatched/spl.c | 3 ++
> configs/sifive_unmatched_defconfig | 6 ++++
> doc/board/sifive/unmatched.rst | 29 +++++++++++++++++++
> 4 files changed, 49 insertions(+)
>
> diff --git a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi
> index c5475aa149..1ee8ab1868 100644
> --- a/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi
> +++ b/arch/riscv/dts/hifive-unmatched-a00-u-boot.dtsi
> @@ -16,6 +16,10 @@
> u-boot,dm-spl;
> };
>
> + config {
> + u-boot,spl-payload-offset = <0x105000>; /* loader2 @1044KB */
> + };
> +
> hfclk {
> u-boot,dm-spl;
> };
> @@ -30,6 +34,13 @@
> clocks = <&rtcclk>;
> };
>
> +&qspi0 {
> + u-boot,dm-spl;
> + flash at 0 {
> + u-boot,dm-spl;
> + };
> +};
> +
> &spi0 {
> mmc at 0 {
> u-boot,dm-spl;
> diff --git a/board/sifive/unmatched/spl.c b/board/sifive/unmatched/spl.c
> index d5663274cd..7c0beedc08 100644
> --- a/board/sifive/unmatched/spl.c
> +++ b/board/sifive/unmatched/spl.c
> @@ -22,6 +22,7 @@
> #define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12)
>
> #define MODE_SELECT_REG 0x1000
> +#define MODE_SELECT_SPI 0x6
> #define MODE_SELECT_SD 0xb
> #define MODE_SELECT_MASK GENMASK(3, 0)
>
> @@ -123,6 +124,8 @@ u32 spl_boot_device(void)
> u32 boot_device = mode_select & MODE_SELECT_MASK;
>
> switch (boot_device) {
> + case MODE_SELECT_SPI:
> + return BOOT_DEVICE_SPI;
> case MODE_SELECT_SD:
> return BOOT_DEVICE_MMC1;
> default:
> diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig
> index 9cc18b029c..d400ed0b23 100644
> --- a/configs/sifive_unmatched_defconfig
> +++ b/configs/sifive_unmatched_defconfig
> @@ -8,6 +8,7 @@ CONFIG_SPL_DM_SPI=y
> CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00"
> CONFIG_SPL_MMC=y
> CONFIG_SPL=y
> +CONFIG_SPL_SPI_FLASH_SUPPORT=y
> CONFIG_SPL_SPI=y
> CONFIG_AHCI=y
> CONFIG_TARGET_SIFIVE_UNMATCHED=y
> @@ -23,17 +24,22 @@ CONFIG_DISPLAY_BOARDINFO=y
> CONFIG_DISPLAY_BOARDINFO_LATE=y
> CONFIG_ID_EEPROM=y
> CONFIG_SPL_SEPARATE_BSS=y
> +CONFIG_SPL_DM_SPI_FLASH=y
> CONFIG_SPL_DM_RESET=y
> +CONFIG_SPL_SPI_LOAD=y
> CONFIG_CMD_EEPROM=y
> CONFIG_CMD_MEMINFO=y
> CONFIG_CMD_PWM=y
> CONFIG_CMD_GPT_RENAME=y
> CONFIG_CMD_PCI=y
> CONFIG_CMD_USB=y
> +CONFIG_USE_ENV_SPI_BUS=y
> +CONFIG_ENV_SPI_BUS=1
> CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> CONFIG_SCSI_AHCI=y
> CONFIG_AHCI_PCI=y
> CONFIG_SPL_CLK=y
> +CONFIG_SPI_FLASH_ISSI=y
> CONFIG_SYS_I2C_EEPROM_ADDR=0x54
> CONFIG_E1000=y
> CONFIG_NVME=y
> diff --git a/doc/board/sifive/unmatched.rst b/doc/board/sifive/unmatched.rst
> index 6b024f07f6..387785d76b 100644
> --- a/doc/board/sifive/unmatched.rst
> +++ b/doc/board/sifive/unmatched.rst
> @@ -534,3 +534,32 @@ Sample boot log from HiFive Unmatched board
> OpenEmbedded nodistro.0 unmatched ttySIF0
>
> unmatched login:
> +
> +
> +Booting from SPI
> +----------------
> +
> +Use Building steps from "Booting from uSD using U-Boot SPL" section.
> +
> +Partition the SPI in Linux via mtdblock.
> +
> +.. code-block:: none
> +
> + sgdisk --clear -a 1 \
> + --new=1:40:2087 --change-name=1:spl --typecode=1:5B193300-FC78-40CD-8002-E86C45580B47 \
> + --new=2:2088:10279 --change-name=2:uboot --typecode=2:2E54B353-1271-4842-806F-E436D6AF6985 \
> + --new=3:10280:10535 --change-name=3:env --typecode=3:0FC63DAF-8483-4772-8E79-3D69D8477DE4 \
nit: Please use hexcodes as printed with sgdisk -L. And also document
what the type is. Documentation is for us humans after all :)
--Sean
> + /dev/mtdblock0
> +
> +Write U-boot SPL and U-boot to their partitions.
> +
> +.. code-block:: none
> +
> + dd if=u-boot-spl.bin of=/dev/mtdblock0 bs=4096 seek=5 conv=sync
> + dd if=u-boot.itb of=/dev/mtdblock0 bs=4096 seek=261 conv=sync
> +
> +Power off the board.
> +
> +Change DIP switches MSEL[3:0] to 0110.
> +
> +Power up the board.
>
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