[PATCH 3/3] arm: socfpga: arria10: Enable double peripheral RBF configuration
Chee, Tien Fong
tien.fong.chee at intel.com
Thu Nov 25 03:13:33 CET 2021
> -----Original Message-----
> From: Kho, Sin Hui <sin.hui.kho at intel.com>
> Sent: Sunday, 7 November, 2021 11:09 PM
> To: u-boot at lists.denx.de
> Cc: Simon Goldschmidt <simon.k.r.goldschmidt at gmail.com>; Marek Vasut
> <marex at denx.de>; Chee, Tien Fong <tien.fong.chee at intel.com>; Hea, Kok
> Kiang <kok.kiang.hea at intel.com>; Westergreen, Dalon
> <dalon.westergreen at intel.com>; Cozart, Sue <sue.cozart at intel.com>; Kho,
> Sin Hui <sin.hui.kho at intel.com>
> Subject: [PATCH 3/3] arm: socfpga: arria10: Enable double peripheral RBF
> configuration
>
> From: Tien Fong Chee <tien.fong.chee at intel.com>
>
> Double peripheral RBF configuration are needed on some devices or boards
> to stabilize the IO configuration system.
>
> Signed-off-by: Tien Fong Chee <tien.fong.chee at intel.com>
> Signed-off-by: Sin Hui Kho <sin.hui.kho at intel.com>
> ---
> arch/arm/mach-socfpga/include/mach/misc.h | 2 ++
> arch/arm/mach-socfpga/misc_arria10.c | 36
> +++++++++++++++++++++++
> arch/arm/mach-socfpga/spl_a10.c | 14 +++++++++
> drivers/fpga/socfpga_arria10.c | 3 +-
> 4 files changed, 54 insertions(+), 1 deletion(-)
>
Reviewed-by: Tien Fong Chee <tien.fong.chee at intel.com>
More information about the U-Boot
mailing list