[PATCH 1/9] board: phytec: phycore_imx8mm: Clean up spl

[Teresa Remmet]

Remove not needed code in the spl board code.

Signed-off-by: Teresa Remmet <t.remmet at phytec.de>
---
 board/phytec/phycore_imx8mm/spl.c | 19 +------------------
 1 file changed, 1 insertion(+), 18 deletions(-)

diff --git a/board/phytec/phycore_imx8mm/spl.c b/board/phytec/phycore_imx8mm/spl.c
index 64f0780f6e65..d54145ef995c 100644
--- a/board/phytec/phycore_imx8mm/spl.c
+++ b/board/phytec/phycore_imx8mm/spl.c
@@ -12,8 +12,6 @@
 #include <asm/global_data.h>
 #include <asm/mach-imx/boot_mode.h>
 #include <asm/mach-imx/iomux-v3.h>
-#include <dm/device.h>
-#include <dm/uclass.h>
 #include <hang.h>
 #include <init.h>
 #include <log.h>
@@ -39,7 +37,7 @@ int spl_board_boot_device(enum boot_device boot_dev_spl)
 	}
 }
 
-void spl_dram_init(void)
+static void spl_dram_init(void)
 {
 	ddr_init(&dram_timing);
 }
@@ -54,15 +52,10 @@ void spl_board_init(void)
 	puts("Normal Boot\n");
 }
 
-#ifdef CONFIG_SPL_LOAD_FIT
 int board_fit_config_name_match(const char *name)
 {
-	/* Just empty function now - can't decide what to choose */
-	debug("%s: %s\n", __func__, name);
-
 	return 0;
 }
-#endif
 
 #define UART_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_FSEL1)
 #define WDOG_PAD_CTRL	(PAD_CTL_DSE6 | PAD_CTL_ODE)
@@ -91,7 +84,6 @@ int board_early_init_f(void)
 
 void board_init_f(ulong dummy)
 {
-	struct udevice *dev;
 	int ret;
 
 	arch_cpu_init();
@@ -100,8 +92,6 @@ void board_init_f(ulong dummy)
 
 	board_early_init_f();
 
-	timer_init();
-
 	preloader_console_init();
 
 	/* Clear the BSS. */
@@ -113,13 +103,6 @@ void board_init_f(ulong dummy)
 		hang();
 	}
 
-	ret = uclass_get_device_by_name(UCLASS_CLK,
-					"clock-controller at 30380000", &dev);
-	if (ret < 0) {
-		printf("Failed to find clock node. Check device tree\n");
-		hang();
-	}
-
 	enable_tzc380();
 
 	/* DDR initialization */
-- 
2.25.1