Please pull u-boot-marvell/master

[Stefan Roese]

Hi Tom,

please pull this first batch of Marvell MVEBU related patches:

----------------------------------------------------------------
- a37xx: pci: Increase PCIe IO size from 64 KiB to 1 MiB (Pali)
- phy: marvell: a3700: Misc improvements (Pali)
- a38x serdes cleanup (Pali)
- A3720 PCIe enhancements (Pali & Marek)
- mvebu: mvebu_armada-8k: Puzzle M801 enhancements (Robert)
- mvebu: x530: Remove custom kwbimage.cfg (Chris)
- mvebu: Select SPL_SKIP_LOWLEVEL_INIT on ARMADA_32BIT (Stefan)
----------------------------------------------------------------

Here the Azure build, without any issues:

https://dev.azure.com/sr0718/u-boot/_build/results?buildId=120&view=results

Thanks,
Stefan


The following changes since commit 7a508a7245592ca44b3dc51c0293656dce60d658:

   Merge tag 'u-boot-amlogic-20211007' of 
https://source.denx.de/u-boot/custodians/u-boot-amlogic (2021-10-07 
09:02:22 -0400)

are available in the Git repository at:

   git at source.denx.de:u-boot/custodians/u-boot-marvell.git

for you to fetch changes up to 1ead6c20bd5fb8ea2f6afffb81dde91ea54bf54a:

   ARM: mvebu: x530: Remove custom kwbimage.cfg (2021-10-08 08:37:55 +0200)

----------------------------------------------------------------
Chris Packham (1):
       ARM: mvebu: x530: Remove custom kwbimage.cfg

Marek Behún (2):
       arm: a37xx: pci: Cosmetic change
       arm: a37xx: pci: Update private structure documentation

Pali Rohár (17):
       arm: a37xx: pci: Increase PCIe IO size from 64 KiB to 1 MiB
       phy: marvell: a3700: Set TXDCLK_2X_SEL bit during PCIe initialization
       phy: marvell: a3700: Fix configuring polarity invert bits
       phy: marvell: a3700: Return correct error code when power up fails
       arm: mvebu: a38x: serdes: Add comments and use macros in PCIe code
       arm: mvebu: a38x: serdes: Remove duplicate macro SOC_CTRL_REG
       arm: mvebu: a38x: serdes: Add comments for hws_pex_config() code
       arm: mvebu: a38x: serdes: Don't overwrite read-only SAR PCIe 
registers
       arm: mvebu: a38x: serdes: Don't set PCIe Common Clock Configuration
       arm: mvebu: a38x: serdes: Don't overwrite PCI device ID
       arm: mvebu: a38x: serdes: Don't configure PCIe cards in SerDes 
init code
       arm: mvebu: a38x: serdes: Remove unused PCIe macros and functions
       arm: mvebu: a38x: serdes: Update comment about PCIE*_ENABLE_* defines
       arm: a37xx: pci: Fix pcie_advk_link_up()
       arm: a37xx: pci: Add support for accessing PCI Bridge on root bus
       arm: a37xx: pci: Do not automatically enable bus mastering on PCI 
Bridge
       arm: a37xx: pci: Handle propagation of CRSSVE bit from PCIe Root Port

Robert Marko (2):
       arm: mvebu: dts: m801: correct CP1 pinctrl
       arm: mvebu: mvebu_armada-8k: drop Puzzle M801 early init code

Stefan Roese (1):
       arm: mvebu: Select SPL_SKIP_LOWLEVEL_INIT on ARMADA_32BIT

  arch/arm/dts/armada-37xx.dtsi                      |   6 +-
  arch/arm/dts/armada-8040-puzzle-m801.dts           |  36 ++-
  arch/arm/mach-mvebu/Kconfig                        |   1 +
  arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.c         | 297 
+--------------------
  arch/arm/mach-mvebu/serdes/a38x/ctrl_pex.h         |  68 +----
  .../mach-mvebu/serdes/a38x/high_speed_env_spec.c   |  42 ++-
  board/Marvell/mvebu_armada-8k/board.c              |  20 +-
  board/alliedtelesis/x530/kwbimage.cfg              |  12 -
  drivers/pci/pci-aardvark.c                         | 199 +++++++++++---
  drivers/phy/marvell/comphy_a3700.c                 |  40 ++-
  drivers/phy/marvell/comphy_a3700.h                 |   1 +
  include/pci.h                                      |   4 +
  12 files changed, 239 insertions(+), 487 deletions(-)
  delete mode 100644 board/alliedtelesis/x530/kwbimage.cfg