[PATCH 1/2] arm: dts: am642-sk: Add and Enable USB SuperSpeed Host Port in SPL
Aswath Govindraju
a-govindraju at ti.com
Wed Oct 20 17:39:12 CEST 2021
From: Kishon Vijay Abraham I <kishon at ti.com>
Add and Enable USB SuperSpeed Host Port in SPL.
Signed-off-by: Kishon Vijay Abraham I <kishon at ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju at ti.com>
---
arch/arm/dts/k3-am642-r5-sk.dts | 40 ++++++++++++++++++++++++++++
arch/arm/dts/k3-am642-sk-u-boot.dtsi | 33 +++++++++++++++++++++++
2 files changed, 73 insertions(+)
diff --git a/arch/arm/dts/k3-am642-r5-sk.dts b/arch/arm/dts/k3-am642-r5-sk.dts
index 79eff8259f94..71fcf61ff9fb 100644
--- a/arch/arm/dts/k3-am642-r5-sk.dts
+++ b/arch/arm/dts/k3-am642-r5-sk.dts
@@ -5,6 +5,8 @@
/dts-v1/;
+#include <dt-bindings/mux/ti-serdes.h>
+#include <dt-bindings/phy/phy.h>
#include "k3-am642.dtsi"
#include "k3-am64-sk-lp4-1333MTs.dtsi"
#include "k3-am64-ddr.dtsi"
@@ -107,6 +109,13 @@
AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */
>;
};
+
+ main_usb0_pins_default: main-usb0-pins-default {
+ u-boot,dm-spl;
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
+ >;
+ };
};
&dmsc {
@@ -142,4 +151,35 @@
pinctrl-0 = <&main_mmc1_pins_default>;
};
+&serdes_ln_ctrl {
+ idle-states = <AM64_SERDES0_LANE0_USB>;
+};
+
+&serdes_wiz0 {
+ status = "okay";
+};
+
+&serdes0 {
+ serdes0_usb_link: link at 0 {
+ reg = <0>;
+ cdns,num-lanes = <1>;
+ #phy-cells = <0>;
+ cdns,phy-type = <PHY_TYPE_USB3>;
+ resets = <&serdes_wiz0 1>;
+ };
+};
+
+&usbss0 {
+ ti,vbus-divider;
+};
+
+&usb0 {
+ dr_mode = "host";
+ maximum-speed = "super-speed";
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_usb0_pins_default>;
+ phys = <&serdes0_usb_link>;
+ phy-names = "cdns3,usb3-phy";
+};
+
#include "k3-am642-sk-u-boot.dtsi"
diff --git a/arch/arm/dts/k3-am642-sk-u-boot.dtsi b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
index efbcfb36e92a..95cf52c37fab 100644
--- a/arch/arm/dts/k3-am642-sk-u-boot.dtsi
+++ b/arch/arm/dts/k3-am642-sk-u-boot.dtsi
@@ -110,3 +110,36 @@
&cpsw_port2 {
status = "disabled";
};
+
+&main_usb0_pins_default {
+ u-boot,dm-spl;
+};
+
+&serdes_ln_ctrl {
+ u-boot,mux-autoprobe;
+};
+
+&usbss0 {
+ u-boot,dm-spl;
+};
+
+&usb0 {
+ dr_mode = "host";
+ u-boot,dm-spl;
+};
+
+&serdes_wiz0 {
+ u-boot,dm-spl;
+};
+
+&serdes0_usb_link {
+ u-boot,dm-spl;
+};
+
+&serdes0 {
+ u-boot,dm-spl;
+};
+
+&serdes_refclk {
+ u-boot,dm-spl;
+};
--
2.17.1
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