[PATCH v3 3/7] arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: use common imx8mm-u-boot.dtsi
Marcel Ziswiler
marcel at ziswiler.com
Sat Oct 23 01:15:12 CEST 2021
From: Marcel Ziswiler <marcel.ziswiler at toradex.com>
Use common imx8mm-u-boot.dtsi.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler at toradex.com>
Reviewed-by: Peng Fan <peng.fan at nxp.com>
---
(no changes since v2)
Changes in v2:
- New patch preparing cl-iot-gate.
.../dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi | 37 +------------------
arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi | 37 +------------------
2 files changed, 4 insertions(+), 70 deletions(-)
diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi
index 67ce70d0bdf..bc8a138e6c0 100644
--- a/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-cl-iot-gate-optee-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright 2019 NXP
*/
+#include "imx8mm-u-boot.dtsi"
+
/ {
binman: binman {
multiple-images;
@@ -22,11 +24,6 @@
};
};
-&{/soc at 0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
&{/soc at 0/bus at 30800000/i2c at 30a30000/pmic at 4b} {
u-boot,dm-spl;
};
@@ -35,19 +32,6 @@
u-boot,dm-spl;
};
-&aips1 {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
-&aips2 {
- u-boot,dm-spl;
-};
-
-&aips3 {
- u-boot,dm-spl;
-};
-
&binman {
u-boot-spl-ddr {
filename = "u-boot-spl-ddr.bin";
@@ -161,14 +145,6 @@
};
};
-&clk {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
&fec1 {
phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
@@ -201,15 +177,6 @@
u-boot,dm-spl;
};
-&iomuxc {
- u-boot,dm-spl;
-};
-
-&osc_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
&pinctrl_i2c2 {
u-boot,dm-spl;
};
diff --git a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
index fe45a35d751..cf3cc191d5a 100644
--- a/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-cl-iot-gate-u-boot.dtsi
@@ -3,6 +3,8 @@
* Copyright 2019 NXP
*/
+#include "imx8mm-u-boot.dtsi"
+
/ {
binman: binman {
multiple-images;
@@ -22,11 +24,6 @@
};
};
-&{/soc at 0} {
- u-boot,dm-pre-reloc;
- u-boot,dm-spl;
-};
-
&{/soc at 0/bus at 30800000/i2c at 30a30000/pmic at 4b} {
u-boot,dm-spl;
};
@@ -35,19 +32,6 @@
u-boot,dm-spl;
};
-&aips1 {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
-&aips2 {
- u-boot,dm-spl;
-};
-
-&aips3 {
- u-boot,dm-spl;
-};
-
&binman {
u-boot-spl-ddr {
filename = "u-boot-spl-ddr.bin";
@@ -149,14 +133,6 @@
};
};
-&clk {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
- /delete-property/ assigned-clocks;
- /delete-property/ assigned-clock-parents;
- /delete-property/ assigned-clock-rates;
-};
-
&fec1 {
phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
};
@@ -189,15 +165,6 @@
u-boot,dm-spl;
};
-&iomuxc {
- u-boot,dm-spl;
-};
-
-&osc_24m {
- u-boot,dm-spl;
- u-boot,dm-pre-reloc;
-};
-
&pinctrl_i2c2 {
u-boot,dm-spl;
};
--
2.26.2
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