[PATCH v4 6/7] arm: dts: apple: Add preliminary device trees
Mark Kettenis
kettenis at openbsd.org
Sat Oct 23 16:58:06 CEST 2021
Add preliminary device trees for the Apple M1 mini (2020) and
Apple M1 Macbook Pro 13" (2020). Device tree bindings for
the Apple M1 SoC are still being formalized and these device
trees will be synchronized with the Linux kernel as needed.
The device trees in this commit are based on the initial Apple
M1 device trees from Linux 5.13, nodes for dart, pcie, pinctrl,
pmgr, usb based on bindings on track for inclusion in Linux
5.15 and 5.16 and nodes for i2c, mailbox, nvme, pmu, spmi and
watchdog that don't have a proposed binding yet.
These device trees are provided as a reference only as U-Boot
uses the device tree passed by the m1n1 bootloader.
Signed-off-by: Mark Kettenis <kettenis at openbsd.org>
Reviewed-by: Simon Glass <sjg at chromium.org>
---
ChangeLog:
v4: - Indicate how device trees deviate from upstream
arch/arm/dts/Makefile | 4 +
arch/arm/dts/t8103-j274.dts | 135 +++++
arch/arm/dts/t8103-j293.dts | 97 +++
arch/arm/dts/t8103.dtsi | 560 ++++++++++++++++++
configs/apple_m1_defconfig | 1 +
.../interrupt-controller/apple-aic.h | 15 +
include/dt-bindings/pinctrl/apple.h | 13 +
include/dt-bindings/spmi/spmi.h | 10 +
8 files changed, 835 insertions(+)
create mode 100644 arch/arm/dts/t8103-j274.dts
create mode 100644 arch/arm/dts/t8103-j293.dts
create mode 100644 arch/arm/dts/t8103.dtsi
create mode 100644 include/dt-bindings/interrupt-controller/apple-aic.h
create mode 100644 include/dt-bindings/pinctrl/apple.h
create mode 100644 include/dt-bindings/spmi/spmi.h
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index ed3d360bb1..ada67904fc 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -29,6 +29,10 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5422-odroidxu3.dtb
dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
+dtb-$(CONFIG_ARCH_APPLE) += \
+ t8103-j274.dtb \
+ t8103-j293.dtb
+
dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-evm.dtb \
da850-lcdk.dtb \
diff --git a/arch/arm/dts/t8103-j274.dts b/arch/arm/dts/t8103-j274.dts
new file mode 100644
index 0000000000..aef1ae29b6
--- /dev/null
+++ b/arch/arm/dts/t8103-j274.dts
@@ -0,0 +1,135 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple Mac mini (M1, 2020)
+ *
+ * target-type: J274
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8103.dtsi"
+
+/ {
+ compatible = "apple,j274", "apple,t8103", "apple,arm-platform";
+ model = "Apple Mac mini (M1, 2020)";
+
+ aliases {
+ serial0 = &serial0;
+ ethernet0 = ð0;
+ wifi0 = &wifi0;
+ };
+
+ chosen {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ stdout-path = "serial0";
+
+ framebuffer0: framebuffer at 0 {
+ compatible = "apple,simple-framebuffer", "simple-framebuffer";
+ reg = <0 0 0 0>; /* To be filled by loader */
+ /* Format properties will be added by loader */
+ status = "disabled";
+ };
+ };
+
+ memory at 800000000 {
+ device_type = "memory";
+ reg = <0x8 0 0x2 0>; /* To be filled by loader */
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&pcie0_dart_0 {
+ status = "okay";
+};
+
+&pcie0_dart_1 {
+ status = "okay";
+};
+
+&pcie0_dart_2 {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+
+ pci0: pci at 0,0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ pwren-gpios = <&smc 13 0>;
+ reset-gpios = <&pinctrl_ap 152 0>;
+ max-link-speed = <2>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+
+ pci1: pci at 1,0 {
+ device_type = "pci";
+ reg = <0x800 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&pinctrl_ap 153 0>;
+ max-link-speed = <2>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+
+ pci2: pci at 2,0 {
+ device_type = "pci";
+ reg = <0x1000 0x0 0x0 0x0 0x0>;
+ reset-gpios = <&pinctrl_ap 33 0>;
+ max-link-speed = <1>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+};
+
+&pci0 {
+ wifi0: network at 0,0 {
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+ local-mac-address = [00 00 00 00 00 00];
+ };
+};
+
+&pci2 {
+ eth0: ethernet at 0,0 {
+ reg = <0x30000 0x0 0x0 0x0 0x0>;
+ local-mac-address = [00 00 00 00 00 00];
+ };
+};
+
+&dwc3_0_dart_0 {
+ status = "okay";
+};
+
+&dwc3_0_dart_1 {
+ status = "okay";
+};
+
+&dwc3_0 {
+ status = "okay";
+};
+
+&dwc3_1_dart_0 {
+ status = "okay";
+};
+
+&dwc3_1_dart_1 {
+ status = "okay";
+};
+
+&dwc3_1 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/t8103-j293.dts b/arch/arm/dts/t8103-j293.dts
new file mode 100644
index 0000000000..4a22596cf4
--- /dev/null
+++ b/arch/arm/dts/t8103-j293.dts
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple Macbook Pro (M1, 2020)
+ *
+ * target-type: J293
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+/dts-v1/;
+
+#include "t8103.dtsi"
+
+/ {
+ compatible = "apple,j293", "apple,t8103", "apple,arm-platform";
+ model = "Apple Macbook Pro (M1, 2020)";
+
+ aliases {
+ serial0 = &serial0;
+ wifi0 = &wifi0;
+ };
+
+ chosen {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ stdout-path = "serial0";
+
+ framebuffer0: framebuffer at 0 {
+ compatible = "apple,simple-framebuffer", "simple-framebuffer";
+ reg = <0 0 0 0>; /* To be filled by loader */
+ /* Format properties will be added by loader */
+ status = "disabled";
+ };
+ };
+
+ memory at 800000000 {
+ device_type = "memory";
+ reg = <0x8 0 0x2 0>; /* To be filled by loader */
+ };
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&pcie0_dart_0 {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+
+ pci0: pci at 0,0 {
+ device_type = "pci";
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ pwren-gpios = <&smc 13 0>;
+ reset-gpios = <&pinctrl_ap 152 0>;
+ max-link-speed = <2>;
+
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges;
+ };
+};
+
+&pci0 {
+ wifi0: network at 0,0 {
+ reg = <0x10000 0x0 0x0 0x0 0x0>;
+ local-mac-address = [00 00 00 00 00 00];
+ };
+};
+
+&dwc3_0_dart_0 {
+ status = "okay";
+};
+
+&dwc3_0_dart_1 {
+ status = "okay";
+};
+
+&dwc3_0 {
+ status = "okay";
+};
+
+&dwc3_1_dart_0 {
+ status = "okay";
+};
+
+&dwc3_1_dart_1 {
+ status = "okay";
+};
+
+&dwc3_1 {
+ status = "okay";
+};
diff --git a/arch/arm/dts/t8103.dtsi b/arch/arm/dts/t8103.dtsi
new file mode 100644
index 0000000000..7d9cb272f9
--- /dev/null
+++ b/arch/arm/dts/t8103.dtsi
@@ -0,0 +1,560 @@
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+/*
+ * Apple T8103 "M1" SoC
+ *
+ * Other names: H13G, "Tonga"
+ *
+ * Copyright The Asahi Linux Contributors
+ */
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/apple-aic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/pinctrl/apple.h>
+#include <dt-bindings/spmi/spmi.h>
+
+/ {
+ compatible = "apple,t8103", "apple,arm-platform";
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ cpu0: cpu at 0 {
+ compatible = "apple,icestorm";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
+
+ cpu1: cpu at 1 {
+ compatible = "apple,icestorm";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
+
+ cpu2: cpu at 2 {
+ compatible = "apple,icestorm";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
+
+ cpu3: cpu at 3 {
+ compatible = "apple,icestorm";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
+
+ cpu4: cpu at 10100 {
+ compatible = "apple,firestorm";
+ device_type = "cpu";
+ reg = <0x0 0x10100>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
+
+ cpu5: cpu at 10101 {
+ compatible = "apple,firestorm";
+ device_type = "cpu";
+ reg = <0x0 0x10101>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
+
+ cpu6: cpu at 10102 {
+ compatible = "apple,firestorm";
+ device_type = "cpu";
+ reg = <0x0 0x10102>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
+
+ cpu7: cpu at 10103 {
+ compatible = "apple,firestorm";
+ device_type = "cpu";
+ reg = <0x0 0x10103>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0>; /* To be filled by loader */
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupt-parent = <&aic>;
+ interrupt-names = "hyp-phys", "hyp-virt", "phys", "virt";
+ interrupts = <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ clkref: clock-ref {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <24000000>;
+ clock-output-names = "clkref";
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ ranges;
+ dma-ranges;
+ dma-coherent;
+ nonposted-mmio;
+
+ serial0: serial at 235200000 {
+ compatible = "apple,s5l-uart";
+ reg = <0x2 0x35200000 0x0 0x1000>;
+ reg-io-width = <4>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkref>, <&clkref>, <&clkref>;
+ clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
+ power-domains = <&ps_uart0>;
+ status = "disabled";
+ };
+
+ serial2: serial at 235208000 {
+ compatible = "apple,s5l-uart";
+ reg = <0x2 0x35208000 0x0 0x1000>;
+ reg-io-width = <4>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkref>, <&clkref>, <&clkref>;
+ clock-names = "uart", "clk_uart_baud0", "clk_uart_baud1";
+ power-domains = <&ps_uart2>;
+ status = "disabled";
+ };
+
+ aic: interrupt-controller at 23b100000 {
+ compatible = "apple,t8103-aic", "apple,aic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x2 0x3b100000 0x0 0x8000>;
+ };
+
+ pmgr: power-controller at 23b700000 {
+ compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ reg = <0x2 0x3b700000 0x0 0x14000>;
+
+ ps_pcie_ref: power-controller at 1a0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1a0>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "pcie_ref";
+ };
+
+ ps_imx: power-controller at 1b8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1b8>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "imx";
+ apple,always-on;
+ };
+
+ ps_sio: power-controller at 1c0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x1c0>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "sio";
+ };
+
+ ps_uart_p: power-controller at 220 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x220>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ power-domains = <&ps_sio>;
+ apple,domain-name = "uart_p";
+ };
+
+ ps_uart0: power-controller at 270 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x270>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ power-domains = <&ps_uart_p>;
+ apple,domain-name = "uart0";
+ };
+
+ ps_uart1: power-controller at 278 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x278>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "uart1";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart2: power-controller at 280 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x280>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "uart2";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_uart3: power-controller at 288 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x288>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "uart3";
+ power-domains = <&ps_uart_p>;
+ };
+
+ ps_apcie: power-controller at 348 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x348>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "apcie";
+ power-domains = <&ps_imx>;
+ };
+
+ ps_apcie_gp: power-controller at 3e8 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3e8>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "apcie_gp";
+ power-domains = <&ps_apcie>;
+ };
+
+ ps_ans2: power-controller at 3f0 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x3f0>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "ans2";
+ power-domains = <&ps_apcie_st>;
+ };
+
+ ps_apcie_st: power-controller at 418 {
+ compatible = "apple,t8103-pmgr-pwrstate", "apple,pmgr-pwrstate";
+ reg = <0x418>;
+ #power-domain-cells = <0>;
+ #reset-cells = <0>;
+ apple,domain-name = "apcie_st";
+ power-domains = <&ps_apcie>;
+ };
+ };
+
+ pinctrl_ap: pinctrl at 23c100000 {
+ compatible = "apple,t8103-pinctrl", "apple,pinctrl";
+ reg = <0x2 0x3c100000 0x0 0x100000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_ap 0 0 212>;
+
+ interrupt-controller;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
+
+ i2c0_pins: i2c0_pins {
+ pinmux = <APPLE_PINMUX(188, 1)>,
+ <APPLE_PINMUX(192, 1)>;
+ };
+
+ pcie_pins: pcie-pins {
+ pinmux = <APPLE_PINMUX(150, 1)>,
+ <APPLE_PINMUX(151, 1)>,
+ <APPLE_PINMUX(32, 1)>;
+ };
+ };
+
+ pinctrl_aop: pinctrl at 24a820000 {
+ compatible = "apple,t8103-pinctrl", "apple,pinctrl";
+ reg = <0x2 0x4a820000 0x0 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_aop 0 0 42>;
+
+ interrupt-controller;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_nub: pinctrl at 23d1f0000 {
+ compatible = "apple,t8103-pinctrl", "apple,pinctrl";
+ reg = <0x2 0x3d1f0000 0x0 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_nub 0 0 23>;
+
+ interrupt-controller;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ pinctrl_smc: pinctrl at 23e820000 {
+ compatible = "apple,t8103-pinctrl", "apple,pinctrl";
+ reg = <0x2 0x3e820000 0x0 0x4000>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = <&pinctrl_smc 0 0 16>;
+
+ interrupt-controller;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ i2c0: i2c at 20a110000 {
+ compatible = "apple,i2c-v0";
+ reg = <0x2 0x35010000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clkref>;
+ pinctrl-0 = <&i2c0_pins>;
+ pinctrl-names = "default";
+ #address-cells = <0x1>;
+ #size-cells = <0x0>;
+
+ hpm0: hpm at 38 {
+ compatible = "ti,tps6598x";
+ reg = <0x38>;
+ };
+
+ hpm1: hpm at 3f {
+ compatible = "ti,tps6598x";
+ reg = <0x3f>;
+ };
+ };
+
+ ans_mbox: mbox at 277400000 {
+ compatible = "apple,iop-mailbox-m1";
+ reg = <0x2 0x77400000 0x0 0x20000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_ans2>;
+ #mbox-cells = <1>;
+ endpoints = <32>;
+ };
+
+ ans at 27bcc0000 {
+ compatible = "apple,nvme-m1";
+ reg = <0x2 0x7bcc0000 0x0 0x40000>,
+ <0x2 0x7bc50000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&ps_apcie_st>;
+ mboxes = <&ans_mbox 32>;
+ };
+
+ pcie0_dart_0: iommu at 681008000 {
+ compatible = "apple,t8103-dart", "apple,dart-m1";
+ reg = <0x6 0x81008000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ pcie0_dart_1: iommu at 682008000 {
+ compatible = "apple,t8103-dart", "apple,dart-m1";
+ reg = <0x6 0x82008000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ pcie0_dart_2: iommu at 683008000 {
+ compatible = "apple,t8103-dart", "apple,dart-m1";
+ reg = <0x6 0x83008000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ smc_mbox: mbox at 23e400000 {
+ compatible = "apple,iop-mailbox-m1";
+ reg = <0x2 0x3e400000 0x0 0x20000>;
+ #mbox-cells = <1>;
+ endpoints = <32>;
+ };
+
+ smc: smc at 23e050000 {
+ compatible = "apple,smc-m1";
+ reg = <0x2 0x3e050000 0x0 0x4000>;
+ mboxes = <&smc_mbox 32>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-13 = <0x00800000>;
+ };
+
+ pcie0: pcie at 690000000 {
+ compatible = "apple,t8103-pcie", "apple,pcie";
+
+ reg = <0x6 0x90000000 0x0 0x1000000>,
+ <0x6 0x80000000 0x0 0x4000>,
+ <0x6 0x81000000 0x0 0x8000>,
+ <0x6 0x82000000 0x0 0x8000>,
+ <0x6 0x83000000 0x0 0x8000>;
+ reg-names = "config", "rc", "port0", "port1", "port2";
+
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
+ <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
+
+ msi-controller;
+ msi-parent = <&pcie0>;
+ msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
+
+ iommu-map = <0x100 &pcie0_dart_0 1 1>,
+ <0x200 &pcie0_dart_1 1 1>,
+ <0x300 &pcie0_dart_2 1 1>;
+ iommu-map-mask = <0xff00>;
+
+ bus-range = <0 3>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000
+ 0x0 0x20000000>,
+ <0x02000000 0x0 0xc0000000 0x6 0xc0000000
+ 0x0 0x40000000>;
+
+ power-domains = <&ps_apcie>, <&ps_apcie_gp>, <&ps_pcie_ref>;
+ pinctrl-0 = <&pcie_pins>;
+ pinctrl-names = "default";
+
+ device_type = "pci";
+ status = "disabled";
+ };
+
+ dwc3_0_dart_0: iommu at 382f00000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x3 0x82f00000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ dwc3_0_dart_1: iommu at 382f80000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x3 0x82f80000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 781 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ dwc3_0: usb at 382280000{
+ compatible = "snps,dwc3";
+ reg = <0x3 0x82280000 0x0 0x100000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 777 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ iommus = <&dwc3_0_dart_0 0>, <&dwc3_0_dart_1 1>;
+ status = "disabled";
+ };
+
+ dwc3_1_dart_0: iommu at 502f00000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x5 0x02f00000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ dwc3_1_dart_1: iommu at 502f80000 {
+ compatible = "apple,t8103-dart";
+ reg = <0x5 0x02f80000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 861 IRQ_TYPE_LEVEL_HIGH>;
+ #iommu-cells = <1>;
+ status = "disabled";
+ };
+
+ dwc3_1: usb at 502280000{
+ compatible = "snps,dwc3";
+ reg = <0x5 0x02280000 0x0 0x100000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 857 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ iommus = <&dwc3_1_dart_0 0>, <&dwc3_1_dart_1 1>;
+ status = "disabled";
+ };
+
+ reboot at 23d2b0000 {
+ compatible = "apple,reboot-v0";
+ reg = <0x2 0x3d2b0000 0x0 0x4000>;
+ };
+
+ spi at 23510c000 {
+ compatible = "apple,t8103-spi", "apple,spi";
+ reg = <0x2 0x3510c000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 617 IRQ_TYPE_LEVEL_HIGH>;
+ cs-gpios = <&pinctrl_ap 49 GPIO_ACTIVE_HIGH>;
+ };
+
+ spmi at 23d0d8000 {
+ compatible = "apple,t8103-spmi", "apple,spmi";
+ reg = <0x2 0x3d0d9300 0x0 0x100>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 343 IRQ_TYPE_LEVEL_HIGH>;
+
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ pmu at f {
+ compatible = "apple,sera-pmu";
+ reg = <0xf SPMI_USID>;
+ };
+ };
+ };
+};
diff --git a/configs/apple_m1_defconfig b/configs/apple_m1_defconfig
index 520d7c7632..d71cbfd043 100644
--- a/configs/apple_m1_defconfig
+++ b/configs/apple_m1_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_ARCH_APPLE=y
+CONFIG_DEFAULT_DEVICE_TREE="t8103-j274"
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_MMC is not set
# CONFIG_NET is not set
diff --git a/include/dt-bindings/interrupt-controller/apple-aic.h b/include/dt-bindings/interrupt-controller/apple-aic.h
new file mode 100644
index 0000000000..9ac56a7e6d
--- /dev/null
+++ b/include/dt-bindings/interrupt-controller/apple-aic.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_APPLE_AIC_H
+#define _DT_BINDINGS_INTERRUPT_CONTROLLER_APPLE_AIC_H
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+#define AIC_IRQ 0
+#define AIC_FIQ 1
+
+#define AIC_TMR_HV_PHYS 0
+#define AIC_TMR_HV_VIRT 1
+#define AIC_TMR_GUEST_PHYS 2
+#define AIC_TMR_GUEST_VIRT 3
+
+#endif
diff --git a/include/dt-bindings/pinctrl/apple.h b/include/dt-bindings/pinctrl/apple.h
new file mode 100644
index 0000000000..ea0a6f4665
--- /dev/null
+++ b/include/dt-bindings/pinctrl/apple.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR MIT */
+/*
+ * This header provides constants for Apple pinctrl bindings.
+ */
+
+#ifndef _DT_BINDINGS_PINCTRL_APPLE_H
+#define _DT_BINDINGS_PINCTRL_APPLE_H
+
+#define APPLE_PINMUX(pin, func) ((pin) | ((func) << 16))
+#define APPLE_PIN(pinmux) ((pinmux) & 0xffff)
+#define APPLE_FUNC(pinmux) ((pinmux) >> 16)
+
+#endif /* _DT_BINDINGS_PINCTRL_APPLE_H */
diff --git a/include/dt-bindings/spmi/spmi.h b/include/dt-bindings/spmi/spmi.h
new file mode 100644
index 0000000000..ad4a43481d
--- /dev/null
+++ b/include/dt-bindings/spmi/spmi.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ */
+#ifndef __DT_BINDINGS_SPMI_H
+#define __DT_BINDINGS_SPMI_H
+
+#define SPMI_USID 0
+#define SPMI_GSID 1
+
+#endif
--
2.33.0
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