[PATCH v3] sunxi: h3: enable clock support for r_pio gpios

[Manuel Dipolt]

This patch enables clock for the r_pio gpios for the h3
r_pio is required to access gpios from port L 

readout or setting of gpio PL10 (for example to control a led):

=> gpio input PL10 
gpio: pin PL10 (gpio 298) value is 0
=> gpio set PL10   
gpio: pin PL10 (gpio 298) value is 1

before:

=> gpio input PL10            
gpio: pin PL10 (gpio 298) value is 0
=> gpio set PL10  
gpio: pin PL10 (gpio 298) value is 1
   Warning: value of pin is still 0


Signed-off-by: Manuel Dipolt <manuel.dipolt at robart.cc>
---
 drivers/gpio/sunxi_gpio.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index cdbc40d48f..0185eda70d 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -14,6 +14,7 @@
 #include <errno.h>
 #include <fdtdec.h>
 #include <malloc.h>
+#include <clk.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 #include <dm/device-internal.h>
@@ -245,6 +246,13 @@ static int gpio_sunxi_probe(struct udevice *dev)
 {
 	struct sunxi_gpio_plat *plat = dev_get_plat(dev);
 	struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct clk gate_clk;
+	int ret;
+
+	ret = clk_get_by_name(dev, "apb", &gate_clk);
+
+	if (!ret)
+		clk_enable(&gate_clk); 
 
 	/* Tell the uclass how many GPIOs we have */
 	if (plat) {
-- 
2.20.1