[PATCH v5 23/28] pci: layerscape: add official ls1028a binding support
Z.Q. Hou
zhiqiang.hou at nxp.com
Sun Oct 31 14:26:04 CET 2021
> -----Original Message-----
> From: Michael Walle [mailto:michael at walle.cc]
> Sent: 2021年10月14日 0:14
> To: u-boot at lists.denx.de
> Cc: Jagan Teki <jagan at amarulasolutions.com>; Priyanka Jain
> <priyanka.jain at nxp.com>; Vladimir Oltean <vladimir.oltean at nxp.com>; Tom Rini
> <trini at konsulko.com>; Peter Griffin <peter.griffin at linaro.org>; Manivannan
> Sadhasivam <manivannan.sadhasivam at linaro.org>; Michael Walle
> <michael at walle.cc>; Z.Q. Hou <zhiqiang.hou at nxp.com>
> Subject: [PATCH v5 23/28] pci: layerscape: add official ls1028a binding support
>
> The official bindind of the PCIe controller of the ls1028a has the following
> compatible string:
> compatible = "fsl,ls1028a-pcie";
>
> Additionally, the resource names and count are different. Update the driver to
> support this binding and change the entry in the ls1028a device tree.
>
> Cc: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
> Signed-off-by: Michael Walle <michael at walle.cc>
> ---
> arch/arm/dts/fsl-ls1028a.dtsi | 20 +++++------
> drivers/pci/pcie_layerscape_rc.c | 61 +++++++++++++++++++++++---------
> 2 files changed, 53 insertions(+), 28 deletions(-)
>
> diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi index
> cc055e65e5..435b965d00 100644
> --- a/arch/arm/dts/fsl-ls1028a.dtsi
> +++ b/arch/arm/dts/fsl-ls1028a.dtsi
> @@ -344,12 +344,10 @@
> };
>
> pcie1: pcie at 3400000 {
> - compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
> - reg = <0x00 0x03400000 0x0 0x80000
> - 0x00 0x03480000 0x0 0x40000 /* lut registers */
> - 0x00 0x034c0000 0x0 0x40000 /* pf controls registers
> */
> - 0x80 0x00000000 0x0 0x20000>; /* configuration space
> */
> - reg-names = "dbi", "lut", "ctrl", "config";
> + compatible = "fsl,ls1028a-pcie";
> + reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers
> */
> + <0x80 0x00000000 0x0 0x00002000>; /* configuration
> space */
> + reg-names = "regs", "config";
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> @@ -360,12 +358,10 @@
> };
>
> pcie2: pcie at 3500000 {
> - compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
> - reg = <0x00 0x03500000 0x0 0x80000
> - 0x00 0x03580000 0x0 0x40000 /* lut registers */
> - 0x00 0x035c0000 0x0 0x40000 /* pf controls registers
> */
> - 0x88 0x00000000 0x0 0x20000>; /* configuration space
> */
> - reg-names = "dbi", "lut", "ctrl", "config";
> + compatible = "fsl,ls1028a-pcie";
> + reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers
> */
> + <0x88 0x00000000 0x0 0x00002000>; /* configuration
> space */
> + reg-names = "regs", "config";
> #address-cells = <3>;
> #size-cells = <2>;
> device_type = "pci";
> diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c
> index f50d6ef653..217b420076 100644
> --- a/drivers/pci/pcie_layerscape_rc.c
> +++ b/drivers/pci/pcie_layerscape_rc.c
> @@ -21,6 +21,12 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +struct ls_pcie_drvdata {
> + u32 lut_offset;
> + u32 ctrl_offset;
> + bool big_endian;
> +};
> +
> static void ls_pcie_cfg0_set_busdev(struct ls_pcie_rc *pcie_rc, u32 busdev) {
> struct ls_pcie *pcie = pcie_rc->pcie;
> @@ -243,6 +249,7 @@ static void ls_pcie_setup_ctrl(struct ls_pcie_rc *pcie_rc)
>
> static int ls_pcie_probe(struct udevice *dev) {
> + const struct ls_pcie_drvdata *drvdata = (void
> +*)dev_get_driver_data(dev);
> struct ls_pcie_rc *pcie_rc = dev_get_priv(dev);
> const void *fdt = gd->fdt_blob;
> int node = dev_of_offset(dev);
> @@ -260,8 +267,12 @@ static int ls_pcie_probe(struct udevice *dev)
>
> pcie_rc->pcie = pcie;
>
> + /* try resource name of the official binding first */
> ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
> - "dbi", &pcie_rc->dbi_res);
> + "regs", &pcie_rc->dbi_res);
> + if (ret)
> + ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
> + "dbi", &pcie_rc->dbi_res);
> if (ret) {
> printf("ls-pcie: resource \"dbi\" not found\n");
> return ret;
> @@ -287,21 +298,29 @@ static int ls_pcie_probe(struct udevice *dev)
> if (pcie->mode == PCI_HEADER_TYPE_NORMAL)
> return 0;
>
> - ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
> - "lut", &pcie_rc->lut_res);
> - if (!ret)
> - pcie->lut = map_physmem(pcie_rc->lut_res.start,
> - fdt_resource_size(&pcie_rc->lut_res),
> - MAP_NOCACHE);
> + if (drvdata) {
> + pcie->lut = pcie->dbi + drvdata->lut_offset;
> + } else {
> + ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
> + "lut", &pcie_rc->lut_res);
> + if (!ret)
> + pcie->lut = map_physmem(pcie_rc->lut_res.start,
> + fdt_resource_size(&pcie_rc->lut_res),
> + MAP_NOCACHE);
> + }
>
> - ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
> - "ctrl", &pcie_rc->ctrl_res);
> - if (!ret)
> - pcie->ctrl = map_physmem(pcie_rc->ctrl_res.start,
> - fdt_resource_size(&pcie_rc->ctrl_res),
> - MAP_NOCACHE);
> - if (!pcie->ctrl)
> - pcie->ctrl = pcie->lut;
> + if (drvdata) {
> + pcie->ctrl = pcie->lut + drvdata->ctrl_offset;
> + } else {
> + ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
> + "ctrl", &pcie_rc->ctrl_res);
> + if (!ret)
> + pcie->ctrl = map_physmem(pcie_rc->ctrl_res.start,
> + fdt_resource_size(&pcie_rc->ctrl_res),
> + MAP_NOCACHE);
> + if (!pcie->ctrl)
> + pcie->ctrl = pcie->lut;
> + }
>
> if (!pcie->ctrl) {
> printf("%s: NOT find CTRL\n", dev->name); @@ -343,7 +362,10 @@
> static int ls_pcie_probe(struct udevice *dev)
> pcie_rc->cfg1 = pcie_rc->cfg0 +
> fdt_resource_size(&pcie_rc->cfg_res) / 2;
>
> - pcie->big_endian = fdtdec_get_bool(fdt, node, "big-endian");
> + if (drvdata)
> + pcie->big_endian = drvdata->big_endian;
> + else
> + pcie->big_endian = fdtdec_get_bool(fdt, node, "big-endian");
>
> debug("%s dbi:%lx lut:%lx ctrl:0x%lx cfg0:0x%lx, big-endian:%d\n",
> dev->name, (unsigned long)pcie->dbi, (unsigned long)pcie->lut, @@
> -373,8 +395,15 @@ static const struct dm_pci_ops ls_pcie_ops = {
> .write_config = ls_pcie_write_config,
> };
>
> +static const struct ls_pcie_drvdata ls1028a_drvdata = {
> + .lut_offset = 0x80000,
> + .ctrl_offset = 0x40000,
> + .big_endian = false,
> +};
> +
> static const struct udevice_id ls_pcie_ids[] = {
> { .compatible = "fsl,ls-pcie" },
> + { .compatible = "fsl,ls1028a-pcie", .data = (ulong)&ls1028a_drvdata },
> { }
> };
>
> --
> 2.30.2
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou at nxp.com>
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