[PATCH 06/13] clocks: qcom: Add clock enable callback support

Sumit Garg sumit.garg at linaro.org
Thu Aug 4 16:27:14 CEST 2022


Drivers like USB, ethernet etc. uses ".enable" hook to enable clocks.
So add corresponding support for Qcom clock drivers.

Signed-off-by: Sumit Garg <sumit.garg at linaro.org>
---
 arch/arm/mach-snapdragon/clock-apq8016.c    | 5 +++++
 arch/arm/mach-snapdragon/clock-apq8096.c    | 5 +++++
 arch/arm/mach-snapdragon/clock-qcs404.c     | 5 +++++
 arch/arm/mach-snapdragon/clock-sdm845.c     | 5 +++++
 arch/arm/mach-snapdragon/clock-snapdragon.c | 7 +++++++
 5 files changed, 27 insertions(+)

diff --git a/arch/arm/mach-snapdragon/clock-apq8016.c b/arch/arm/mach-snapdragon/clock-apq8016.c
index 6e4a0ccb90..23a37a1714 100644
--- a/arch/arm/mach-snapdragon/clock-apq8016.c
+++ b/arch/arm/mach-snapdragon/clock-apq8016.c
@@ -111,3 +111,8 @@ ulong msm_set_rate(struct clk *clk, ulong rate)
 		return 0;
 	}
 }
+
+int msm_enable(struct clk *clk)
+{
+	return 0;
+}
diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/arch/arm/mach-snapdragon/clock-apq8096.c
index e5011be8f2..66184596d5 100644
--- a/arch/arm/mach-snapdragon/clock-apq8096.c
+++ b/arch/arm/mach-snapdragon/clock-apq8096.c
@@ -93,3 +93,8 @@ ulong msm_set_rate(struct clk *clk, ulong rate)
 		return 0;
 	}
 }
+
+int msm_enable(struct clk *clk)
+{
+	return 0;
+}
diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c b/arch/arm/mach-snapdragon/clock-qcs404.c
index bb8a6fe067..230d7779a7 100644
--- a/arch/arm/mach-snapdragon/clock-qcs404.c
+++ b/arch/arm/mach-snapdragon/clock-qcs404.c
@@ -77,3 +77,8 @@ ulong msm_set_rate(struct clk *clk, ulong rate)
 
 	return 0;
 }
+
+int msm_enable(struct clk *clk)
+{
+	return 0;
+}
diff --git a/arch/arm/mach-snapdragon/clock-sdm845.c b/arch/arm/mach-snapdragon/clock-sdm845.c
index f69be80898..d6df0365af 100644
--- a/arch/arm/mach-snapdragon/clock-sdm845.c
+++ b/arch/arm/mach-snapdragon/clock-sdm845.c
@@ -91,3 +91,8 @@ ulong msm_set_rate(struct clk *clk, ulong rate)
 		return 0;
 	}
 }
+
+int msm_enable(struct clk *clk)
+{
+	return 0;
+}
diff --git a/arch/arm/mach-snapdragon/clock-snapdragon.c b/arch/arm/mach-snapdragon/clock-snapdragon.c
index 5652d2fa36..fda7098274 100644
--- a/arch/arm/mach-snapdragon/clock-snapdragon.c
+++ b/arch/arm/mach-snapdragon/clock-snapdragon.c
@@ -20,6 +20,7 @@
 #define CBCR_BRANCH_OFF_BIT     BIT(31)
 
 extern ulong msm_set_rate(struct clk *clk, ulong rate);
+extern int msm_enable(struct clk *clk);
 
 /* Enable clock controlled by CBC soft macro */
 void clk_enable_cbc(phys_addr_t cbcr)
@@ -126,8 +127,14 @@ static ulong msm_clk_set_rate(struct clk *clk, ulong rate)
 	return msm_set_rate(clk, rate);
 }
 
+static int msm_clk_enable(struct clk *clk)
+{
+	return msm_enable(clk);
+}
+
 static struct clk_ops msm_clk_ops = {
 	.set_rate = msm_clk_set_rate,
+	.enable = msm_clk_enable,
 };
 
 static const struct udevice_id msm_clk_ids[] = {
-- 
2.25.1



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