[PATCH 1/4] arm: bcmbca: add bcm63146 SoC support
William Zhang
william.zhang at broadcom.com
Sat Aug 6 03:34:00 CEST 2022
BCM63146 is a Broadcom B53 based DSL Broadband SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang at broadcom.com>
---
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/bcm63146.dtsi | 110 ++++++++++++++++++++++
arch/arm/dts/bcm963146.dts | 30 ++++++
arch/arm/mach-bcmbca/Kconfig | 8 ++
arch/arm/mach-bcmbca/Makefile | 1 +
arch/arm/mach-bcmbca/bcm63146/Kconfig | 17 ++++
arch/arm/mach-bcmbca/bcm63146/Makefile | 5 +
arch/arm/mach-bcmbca/bcm63146/mmu_table.c | 32 +++++++
board/broadcom/bcmbca/Kconfig | 7 ++
configs/bcm963146_defconfig | 23 +++++
include/configs/bcm963146.h | 11 +++
12 files changed, 247 insertions(+)
create mode 100644 arch/arm/dts/bcm63146.dtsi
create mode 100644 arch/arm/dts/bcm963146.dts
create mode 100644 arch/arm/mach-bcmbca/bcm63146/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm63146/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm63146/mmu_table.c
create mode 100644 configs/bcm963146_defconfig
create mode 100644 include/configs/bcm963146.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 2a27d15705cb..9a4751153524 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -220,6 +220,7 @@ F: drivers/timer/bcmbca-timer.c
N: bcmbca
N: bcm[9]?47622
N: bcm[9]?63138
+N: bcm[9]?63146
N: bcm[9]?63148
N: bcm[9]?63178
N: bcm[9]?6756
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f4fa6f517744..f0615aba4960 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1167,6 +1167,8 @@ dtb-$(CONFIG_BCM47622) += \
bcm947622.dtb
dtb-$(CONFIG_BCM63138) += \
bcm963138.dtb
+dtb-$(CONFIG_BCM63146) += \
+ bcm963146.dtb
dtb-$(CONFIG_BCM63148) += \
bcm963148.dtb
dtb-$(CONFIG_BCM63178) += \
diff --git a/arch/arm/dts/bcm63146.dtsi b/arch/arm/dts/bcm63146.dtsi
new file mode 100644
index 000000000000..04de96bd0a03
--- /dev/null
+++ b/arch/arm/dts/bcm63146.dtsi
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm63146", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu at 0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu at 1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi at 81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller at 1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus at ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial at 12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/dts/bcm963146.dts b/arch/arm/dts/bcm963146.dts
new file mode 100644
index 000000000000..e39f1e6d4774
--- /dev/null
+++ b/arch/arm/dts/bcm963146.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm63146.dtsi"
+
+/ {
+ model = "Broadcom BCM963146 Reference Board";
+ compatible = "brcm,bcm963146", "brcm,bcm63146", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory at 0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index 785b3df5dcc2..932fa19df810 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -20,6 +20,13 @@ config BCM63138
select DM_SERIAL
select BCM6345_SERIAL
+config BCM63146
+ bool "Support for Broadcom 63146 Family"
+ select ARM64
+ select SYS_ARCH_TIMER
+ select DM_SERIAL
+ select PL01X_SERIAL
+
config BCM63148
bool "Support for Broadcom 63148 Family"
select SYS_ARCH_TIMER
@@ -57,6 +64,7 @@ config BCM6878
source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
source "arch/arm/mach-bcmbca/bcm63138/Kconfig"
+source "arch/arm/mach-bcmbca/bcm63146/Kconfig"
source "arch/arm/mach-bcmbca/bcm63148/Kconfig"
source "arch/arm/mach-bcmbca/bcm63178/Kconfig"
source "arch/arm/mach-bcmbca/bcm6756/Kconfig"
diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index d917615c1669..e177b6298b24 100644
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_BCM47622) += bcm47622/
obj-$(CONFIG_BCM63138) += bcm63138/
+obj-$(CONFIG_BCM63146) += bcm63146/
obj-$(CONFIG_BCM63148) += bcm63148/
obj-$(CONFIG_BCM63178) += bcm63178/
obj-$(CONFIG_BCM6756) += bcm6756/
diff --git a/arch/arm/mach-bcmbca/bcm63146/Kconfig b/arch/arm/mach-bcmbca/bcm63146/Kconfig
new file mode 100644
index 000000000000..690cbf1eb20a
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm63146/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM63146
+
+config TARGET_BCM963146
+ bool "Broadcom 63146 Reference Board"
+ depends on ARCH_BCMBCA
+
+config SYS_SOC
+ default "bcm63146"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif
diff --git a/arch/arm/mach-bcmbca/bcm63146/Makefile b/arch/arm/mach-bcmbca/bcm63146/Makefile
new file mode 100644
index 000000000000..62624977034b
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm63146/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o
diff --git a/arch/arm/mach-bcmbca/bcm63146/mmu_table.c b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c
new file mode 100644
index 000000000000..c6b7a54fbdfa
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm963146_mem_map[] = {
+ {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 1UL * SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ },
+ {
+ /* SoC peripheral */
+ .virt = 0xff800000UL,
+ .phys = 0xff800000UL,
+ .size = 0x100000,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ },
+ {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = bcm963146_mem_map;
diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index aefd7372d883..6beb1417348d 100644
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -23,6 +23,13 @@ config SYS_CONFIG_NAME
endif
+if TARGET_BCM963146
+
+config SYS_CONFIG_NAME
+ default "bcm963146"
+
+endif
+
if TARGET_BCM963148
config SYS_CONFIG_NAME
diff --git a/configs/bcm963146_defconfig b/configs/bcm963146_defconfig
new file mode 100644
index 000000000000..4dcc0fd7b1ee
--- /dev/null
+++ b/configs/bcm963146_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM63146=y
+CONFIG_TARGET_BCM963146=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="bcm963146"
+CONFIG_IDENT_STRING=" Broadcom BCM63146"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
diff --git a/include/configs/bcm963146.h b/include/configs/bcm963146.h
new file mode 100644
index 000000000000..edbdfc3c51ad
--- /dev/null
+++ b/include/configs/bcm963146.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM963146_H
+#define __BCM963146_H
+
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+
+#endif
--
2.37.1
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