[PATCH 1/7] arm: dts: imx8mn-u-boot: Create common imx8mn-u-boot.dtsi
Adam Ford
aford173 at gmail.com
Sun Aug 14 18:32:10 CEST 2022
On Sun, Jul 31, 2022 at 6:46 PM Adam Ford <aford173 at gmail.com> wrote:
>
> Multiple boards create duplicate entries in their respective
> -u-boot.dtsi files which all basically do the same thing.
> To consolidate these and make it easier to make improvements
> going forward, consolidate them all into one place.
>
> This file creates a flash.bin image using binman, and supports
> LPDDR4, DDR4 and DDR3. Since individual boards use different
> peripherals and different UART ports, those entries were kept
> in their respective board files, but the spba1 node was addded
> which contains all UART1-3 to help facilitate SPL_DM_SERIAL.
> Individual users will still need to include their respective
> UART and pinctrl nodes for those UARTS.
>
> This consolidated file also supports generating a flash.bin file
> which can boot from flexSPI if CONFIG_FSPI_CONF_HEADER is
> enabled.
>
Fabio / Peng,
Any chance either one of you could review this? This series should
fix any Nano boards that cannot boot and currently use DM_SERIAL.
after 4e5114daf9eb ("imx8mn: synchronise device tree with linux")
which moved the UART nodes under the SPBA node.
thanks
adam
> Signed-off-by: Adam Ford <aford173 at gmail.com>
> ---
> Patches on top of [1]
>
> [1] - https://patchwork.ozlabs.org/project/uboot/patch/20220731171610.487086-1-aford173@gmail.com/
>
> diff --git a/arch/arm/dts/imx8mn-u-boot.dtsi b/arch/arm/dts/imx8mn-u-boot.dtsi
> new file mode 100644
> index 0000000000..327d4070fc
> --- /dev/null
> +++ b/arch/arm/dts/imx8mn-u-boot.dtsi
> @@ -0,0 +1,248 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright 2022 Logic PD, Inc dba Beacon EmbeddedWorks
> + */
> +
> +/ {
> + binman: binman {
> + multiple-images;
> + };
> +
> + firmware {
> + optee {
> + compatible = "linaro,optee-tz";
> + method = "smc";
> + };
> + };
> +
> + wdt-reboot {
> + compatible = "wdt-reboot";
> + wdt = <&wdog1>;
> + u-boot,dm-spl;
> + };
> +};
> +
> +&{/soc at 0} {
> + u-boot,dm-pre-reloc;
> + u-boot,dm-spl;
> +};
> +
> +&aips1 {
> + u-boot,dm-spl;
> + u-boot,dm-pre-reloc;
> +};
> +
> +&aips2 {
> + u-boot,dm-spl;
> +};
> +
> +&aips3 {
> + u-boot,dm-spl;
> +};
> +
> +&aips4 {
> + u-boot,dm-spl;
> +};
> +
> +&clk {
> + u-boot,dm-spl;
> + u-boot,dm-pre-reloc;
> + /delete-property/ assigned-clocks;
> + /delete-property/ assigned-clock-parents;
> + /delete-property/ assigned-clock-rates;
> +};
> +
> +&iomuxc {
> + u-boot,dm-spl;
> +};
> +
> +&osc_24m {
> + u-boot,dm-spl;
> + u-boot,dm-pre-reloc;
> +};
> +
> +&spba1 {
> + u-boot,dm-spl;
> +};
> +
> +&wdog1 {
> + u-boot,dm-spl;
> +};
> +
> +&binman {
> + u-boot-spl-ddr {
> + filename = "u-boot-spl-ddr.bin";
> + pad-byte = <0xff>;
> + align-size = <4>;
> + align = <4>;
> +
> + u-boot-spl {
> + align-end = <4>;
> + filename = "u-boot-spl.bin";
> + };
> +
> + ddr-1d-imem-fw {
> +#ifdef CONFIG_IMX8M_LPDDR4
> + filename = "lpddr4_pmu_train_1d_imem.bin";
> +#elif CONFIG_IMX8M_DDR4
> + filename = "ddr4_imem_1d.bin";
> +#else
> + filename = "ddr3_imem_1d.bin";
> +#endif
> + type = "blob-ext";
> + align-end = <4>;
> + };
> +
> + ddr-1d-dmem-fw {
> +#ifdef CONFIG_IMX8M_LPDDR4
> + filename = "lpddr4_pmu_train_1d_dmem.bin";
> +#elif CONFIG_IMX8M_DDR4
> + filename = "ddr4_dmem_1d.bin";
> +#else
> + filename = "ddr3_dmem_1d.bin";
> +#endif
> + type = "blob-ext";
> + align-end = <4>;
> + };
> +
> + ddr-2d-imem-fw {
> +#ifdef CONFIG_IMX8M_LPDDR4
> + filename = "lpddr4_pmu_train_2d_imem.bin";
> +#elif CONFIG_IMX8M_DDR4
> + filename = "ddr4_imem_2d.bin";
> +#endif
> + type = "blob-ext";
> + align-end = <4>;
> + };
> +
> + ddr-2d-dmem-fw {
> +#ifdef CONFIG_IMX8M_LPDDR4
> + filename = "lpddr4_pmu_train_2d_dmem.bin";
> +#elif CONFIG_IMX8M_DDR4
> + filename = "ddr4_dmem_2d.bin";
> +#endif
> + type = "blob-ext";
> + align-end = <4>;
> + };
> + };
> +
> + spl {
> + filename = "spl.bin";
> +
> + mkimage {
> + args = "-n spl/u-boot-spl.cfgout -T imx8mimage -e 0x912000";
> +
> + blob {
> + filename = "u-boot-spl-ddr.bin";
> + };
> + };
> + };
> +
> + itb {
> + filename = "u-boot.itb";
> +
> + fit {
> + description = "Configuration to load ATF before U-Boot";
> + fit,external-offset = <CONFIG_FIT_EXTERNAL_OFFSET>;
> + fit,fdt-list = "of-list";
> + #address-cells = <1>;
> +
> + images {
> + uboot {
> + arch = "arm64";
> + compression = "none";
> + description = "U-Boot (64-bit)";
> + load = <CONFIG_SYS_TEXT_BASE>;
> + type = "standalone";
> +
> + uboot-blob {
> + filename = "u-boot-nodtb.bin";
> + type = "blob-ext";
> + };
> + };
> +
> + atf {
> + arch = "arm64";
> + compression = "none";
> + description = "ARM Trusted Firmware";
> + entry = <0x960000>;
> + load = <0x960000>;
> + type = "firmware";
> +
> + atf-blob {
> + filename = "bl31.bin";
> + type = "atf-bl31";
> + };
> + };
> +
> + binman_fip: fip {
> + arch = "arm64";
> + compression = "none";
> + description = "Trusted Firmware FIP";
> + load = <0x40310000>;
> + type = "firmware";
> + };
> +
> + @fdt-SEQ {
> + compression = "none";
> + description = "NAME";
> + type = "flat_dt";
> +
> + uboot-fdt-blob {
> + filename = "u-boot.dtb";
> + type = "blob-ext";
> + };
> + };
> + };
> +
> + configurations {
> + default = "@config-DEFAULT-SEQ";
> +
> + binman_configuration: @config-SEQ {
> + description = "NAME";
> + fdt = "fdt-SEQ";
> + firmware = "uboot";
> + loadables = "atf";
> + };
> + };
> + };
> + };
> +
> + imx-boot {
> + filename = "flash.bin";
> + pad-byte = <0x00>;
> +
> +#ifdef CONFIG_FSPI_CONF_HEADER
> + fspi_conf_block {
> + filename = CONFIG_FSPI_CONF_FILE;
> + type = "blob-ext";
> + offset = <0x400>;
> + };
> +
> + spl {
> + filename = "spl.bin";
> + offset = <0x1000>;
> + type = "blob-ext";
> + };
> +
> + binman_uboot: uboot {
> + filename = "u-boot.itb";
> + offset = <0x59000>;
> + type = "blob-ext";
> + };
> +#else
> +
> + spl {
> + offset = <0x0>;
> + filename = "spl.bin";
> + type = "blob-ext";
> + };
> +
> + binman_uboot: uboot {
> + offset = <0x58000>;
> + filename = "u-boot.itb";
> + type = "blob-ext";
> + };
> +#endif
> + };
> +};
> --
> 2.34.1
>
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