[PATCH v2 28/28] board: Add Edgeble AI Edge Compute Module 0 Carrier

Jagan Teki jagan at edgeble.ai
Thu Aug 18 16:52:46 CEST 2022


Edge Compute Module 0 Carrier is an industrial form factor evaluation
board from Edgeble AI.

General features:
- microSD slot
- 2x MIPI CSI2 connectors
- MIPI DSI connector
- 2x USB Host
- 1x USB OTG
- Ethernet
- mini PCIe
- Onboard PoE
- RS485, RS232, CAN
- Micro Phone array
- Speaker
- RTC battery slot
- 40-pin expansion

Edge Compute Module 0 needs to mount on top of this Carrier board for
creating Edge Compute Module 0 Carrier platform.

Add support for it.

Signed-off-by: Jagan Teki <jagan at edgeble.ai>
---
Changes for v2:
- none

 .../rv1126-edgeble-ecm0-carrier-u-boot.dtsi   | 10 ++++
 arch/arm/mach-rockchip/rv1126/Kconfig         | 12 ++++
 board/edgeble/edge-compute-module-0/Kconfig   | 16 ++++++
 .../edgeble/edge-compute-module-0/MAINTAINERS |  6 ++
 board/edgeble/edge-compute-module-0/Makefile  |  7 +++
 board/edgeble/edge-compute-module-0/ecm0.c    |  4 ++
 configs/ecm0-carrier-rv1126_defconfig         | 56 +++++++++++++++++++
 include/configs/edge-compute-module-0.h       | 21 +++++++
 8 files changed, 132 insertions(+)
 create mode 100644 arch/arm/dts/rv1126-edgeble-ecm0-carrier-u-boot.dtsi
 create mode 100644 board/edgeble/edge-compute-module-0/Kconfig
 create mode 100644 board/edgeble/edge-compute-module-0/MAINTAINERS
 create mode 100644 board/edgeble/edge-compute-module-0/Makefile
 create mode 100644 board/edgeble/edge-compute-module-0/ecm0.c
 create mode 100644 configs/ecm0-carrier-rv1126_defconfig
 create mode 100644 include/configs/edge-compute-module-0.h

diff --git a/arch/arm/dts/rv1126-edgeble-ecm0-carrier-u-boot.dtsi b/arch/arm/dts/rv1126-edgeble-ecm0-carrier-u-boot.dtsi
new file mode 100644
index 0000000000..51a1617708
--- /dev/null
+++ b/arch/arm/dts/rv1126-edgeble-ecm0-carrier-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#include "rv1126-u-boot.dtsi"
+
+&sdio {
+	status = "disabled";
+};
diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig b/arch/arm/mach-rockchip/rv1126/Kconfig
index 86abc4e2fa..3078a97f40 100644
--- a/arch/arm/mach-rockchip/rv1126/Kconfig
+++ b/arch/arm/mach-rockchip/rv1126/Kconfig
@@ -1,5 +1,15 @@
 if ROCKCHIP_RV1126
 
+config TARGET_RV1126_ECM0
+	bool "Edgeble AI Edge Compute Module 0 SoM"
+	help
+	  Edge Compute Module 0 is a 96boards SoM-CB compute module based
+	  on Rockchip RV1126 from Edgeble AI.
+
+	  ECM0-Carrier:
+	  Edge Compute Module 0 needs to mount on top of this Carrier board
+          for creating Edge Compute Module 0 Carrier platform.
+
 config SOC_SPECIFIC_OPTIONS # dummy
 	def_bool y
 	select HAS_CUSTOM_SYS_INIT_SP_ADDR
@@ -40,4 +50,6 @@ config SYS_MALLOC_F_LEN
 config SYS_TEXT_BASE
 	default 0x600000
 
+source board/edgeble/edge-compute-module-0/Kconfig
+
 endif
diff --git a/board/edgeble/edge-compute-module-0/Kconfig b/board/edgeble/edge-compute-module-0/Kconfig
new file mode 100644
index 0000000000..65b2faa10b
--- /dev/null
+++ b/board/edgeble/edge-compute-module-0/Kconfig
@@ -0,0 +1,16 @@
+if TARGET_RV1126_ECM0
+
+config SYS_BOARD
+	default "edge-compute-module-0"
+
+config SYS_VENDOR
+	default "edgeble"
+
+config SYS_CONFIG_NAME
+	default "edge-compute-module-0"
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select RAM_ROCKCHIP_LPDDR4
+
+endif
diff --git a/board/edgeble/edge-compute-module-0/MAINTAINERS b/board/edgeble/edge-compute-module-0/MAINTAINERS
new file mode 100644
index 0000000000..f21295cc6c
--- /dev/null
+++ b/board/edgeble/edge-compute-module-0/MAINTAINERS
@@ -0,0 +1,6 @@
+RV1126-ECM0
+M:	Jagan Teki <jagan at edgeble.ai>
+S:	Maintained
+F:	board/edgeble-ai/edge-compute-module-0
+F:	include/configs/edge-compute-module-0.h
+F:	configs/ecm0-carrier-rv1126_defconfig
diff --git a/board/edgeble/edge-compute-module-0/Makefile b/board/edgeble/edge-compute-module-0/Makefile
new file mode 100644
index 0000000000..c42a0b7fba
--- /dev/null
+++ b/board/edgeble/edge-compute-module-0/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+#
+# SPDX-License-Identifier:     GPL-2.0+
+#
+
+obj-y += ecm0.o
diff --git a/board/edgeble/edge-compute-module-0/ecm0.c b/board/edgeble/edge-compute-module-0/ecm0.c
new file mode 100644
index 0000000000..3d2262ce97
--- /dev/null
+++ b/board/edgeble/edge-compute-module-0/ecm0.c
@@ -0,0 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
diff --git a/configs/ecm0-carrier-rv1126_defconfig b/configs/ecm0-carrier-rv1126_defconfig
new file mode 100644
index 0000000000..11cd68fb41
--- /dev/null
+++ b/configs/ecm0-carrier-rv1126_defconfig
@@ -0,0 +1,56 @@
+CONFIG_ARM=y
+CONFIG_SPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_TPL_SKIP_LOWLEVEL_INIT_ONLY=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_DEFAULT_DEVICE_TREE="rv1126-edgeble-ecm0-carrier"
+CONFIG_ROCKCHIP_RV1126=y
+CONFIG_TARGET_RV1126_ECM0=y
+CONFIG_DEBUG_UART_BASE=0xff570000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0xe00800
+CONFIG_DEBUG_UART=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_DEFAULT_FDT_FILE="rv1126-edgeble-ecm0-carrier.dtb"
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_NO_BSS_LIMIT=y
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
+# CONFIG_CMD_BOOTD is not set
+CONFIG_SYS_BOOTM_LEN=0x4000000
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_IMI is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_GPT=y
+# CONFIG_CMD_LOADB is not set
+# CONFIG_CMD_LOADS is not set
+CONFIG_CMD_MMC=y
+# CONFIG_CMD_ITEST is not set
+# CONFIG_CMD_SETEXPR is not set
+# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_MISC=y
+CONFIG_MMC_DW=y
+CONFIG_MMC_DW_ROCKCHIP=y
+CONFIG_REGULATOR_PWM=y
+CONFIG_PWM_ROCKCHIP=y
+# CONFIG_RAM_ROCKCHIP_DEBUG is not set
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYSRESET=y
+# CONFIG_TPL_SYSRESET is not set
+CONFIG_DM_THERMAL=y
+CONFIG_SPL_TINY_MEMSET=y
+CONFIG_LZO=y
+CONFIG_ERRNO_STR=y
diff --git a/include/configs/edge-compute-module-0.h b/include/configs/edge-compute-module-0.h
new file mode 100644
index 0000000000..32f4e3227b
--- /dev/null
+++ b/include/configs/edge-compute-module-0.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd.
+ */
+
+#ifndef __EDGE_COMPUTE_MODULE_0_H
+#define __EDGE_COMPUTE_MODULE_0_H
+
+#define ROCKCHIP_DEVICE_SETTINGS \
+		"stdout=serial,vidconsole\0" \
+		"stderr=serial,vidconsole\0"
+
+#include <configs/rv1126_common.h>
+
+#undef BOOT_TARGET_DEVICES
+
+#define BOOT_TARGET_DEVICES(func) \
+	func(MMC, mmc, 0) \
+	func(MMC, mmc, 1)
+
+#endif /* __EDGE_COMPUTE_MODULE_0_H */
-- 
2.25.1



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