[v5 06/14] arm: dts: aspeed: Update SPI flash node settings
Chin-Ting Kuo
chin-ting_kuo at aspeedtech.com
Fri Aug 19 11:01:07 CEST 2022
For both AST2500 and AST2600, there are three
SPI controllers, FMC(Firmware Memory Controller),
SPI1 and SPI2. The clock source is HCLK. Following
is the basic information for ASPEED SPI controller.
AST2500:
- FMC:
CS number: 3
controller reg: 0x1e620000 - 0x1e62ffff
decoded address: 0x20000000 - 0x2fffffff
- SPI1:
CS number: 2
controller reg: 0x1e630000 - 0x1e630fff
decoded address: 0x30000000 - 0x37ffffff
- SPI2:
CS number: 2
controller reg: 0x1e631000 - 0x1e631fff
decoded address: 0x38000000 - 0x3fffffff
AST2600:
- FMC:
CS number: 3
controller reg: 0x1e620000 - 0x1e62ffff
decoded address: 0x20000000 - 0x2fffffff
- SPI1:
CS number: 2
controller reg: 0x1e630000 - 0x1e630fff
decoded address: 0x30000000 - 0x3fffffff
- SPI2:
CS number: 3
controller reg: 0x1e631000 - 0x1e631fff
decoded address: 0x50000000 - 0x5fffffff
Signed-off-by: Chin-Ting Kuo <chin-ting_kuo at aspeedtech.com>
---
arch/arm/dts/ast2500-evb.dts | 33 +++++++++++++++++++++++++++++++++
arch/arm/dts/ast2500.dtsi | 23 ++++++++++++++++-------
arch/arm/dts/ast2600-evb.dts | 8 --------
arch/arm/dts/ast2600.dtsi | 34 +++++++++++++++++++---------------
4 files changed, 68 insertions(+), 30 deletions(-)
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index cc577761fa..1fbacf985f 100644
--- a/arch/arm/dts/ast2500-evb.dts
+++ b/arch/arm/dts/ast2500-evb.dts
@@ -78,6 +78,39 @@
pinctrl-0 = <&pinctrl_sd2_default>;
};
+&fmc {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fwspics1_default>;
+
+ flash at 0 {
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ };
+
+ flash at 1 {
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1cs1_default>;
+
+ flash at 0 {
+ status = "okay";
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ };
+};
+
&i2c3 {
status = "okay";
diff --git a/arch/arm/dts/ast2500.dtsi b/arch/arm/dts/ast2500.dtsi
index cea08e6f08..320d2e5340 100644
--- a/arch/arm/dts/ast2500.dtsi
+++ b/arch/arm/dts/ast2500.dtsi
@@ -57,23 +57,26 @@
ranges;
fmc: flash-controller at 1e620000 {
- reg = < 0x1e620000 0xc4
- 0x20000000 0x10000000 >;
+ reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-fmc";
+ clocks = <&scu ASPEED_CLK_AHB>;
+ num-cs = <3>;
status = "disabled";
- interrupts = <19>;
+
flash at 0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 2 {
reg = < 2 >;
compatible = "jedec,spi-nor";
@@ -82,17 +85,20 @@
};
spi1: flash-controller at 1e630000 {
- reg = < 0x1e630000 0xc4
- 0x30000000 0x08000000 >;
+ reg = <0x1e630000 0xc4>, <0x30000000 0x08000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-spi";
+ clocks = <&scu ASPEED_CLK_AHB>;
+ num-cs = <2>;
status = "disabled";
+
flash at 0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
@@ -101,17 +107,20 @@
};
spi2: flash-controller at 1e631000 {
- reg = < 0x1e631000 0xc4
- 0x38000000 0x08000000 >;
+ reg = <0x1e631000 0xc4>, <0x38000000 0x08000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2500-spi";
+ clocks = <&scu ASPEED_CLK_AHB>;
+ num-cs = <2>;
status = "disabled";
+
flash at 0 {
reg = < 0 >;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 1 {
reg = < 1 >;
compatible = "jedec,spi-nor";
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index a9bba96816..a097f320e4 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -72,12 +72,10 @@
&fmc {
status = "okay";
-
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fmcquad_default>;
flash at 0 {
- compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
@@ -85,7 +83,6 @@
};
flash at 1 {
- compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
@@ -93,7 +90,6 @@
};
flash at 2 {
- compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
@@ -103,14 +99,12 @@
&spi1 {
status = "okay";
-
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default &pinctrl_spi1abr_default
&pinctrl_spi1cs1_default &pinctrl_spi1wp_default
&pinctrl_spi1wp_default &pinctrl_spi1quad_default>;
flash at 0 {
- compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
@@ -120,13 +114,11 @@
&spi2 {
status = "okay";
-
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi2_default &pinctrl_spi2cs1_default
&pinctrl_spi2cs2_default &pinctrl_spi2quad_default>;
flash at 0 {
- compatible = "spi-flash", "sst,w25q256";
status = "okay";
spi-max-frequency = <50000000>;
spi-tx-bus-width = <4>;
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index ac8cd4d67d..8d91eedc17 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -129,74 +129,78 @@
};
fmc: flash-controller at 1e620000 {
- reg = < 0x1e620000 0xc4
- 0x20000000 0x10000000 >;
+ reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-fmc";
status = "disabled";
- interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_AHB>;
num-cs = <3>;
+
flash at 0 {
- reg = < 0 >;
+ reg = <0>;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 1 {
- reg = < 1 >;
+ reg = <1>;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 2 {
- reg = < 2 >;
+ reg = <2>;
compatible = "jedec,spi-nor";
status = "disabled";
};
};
spi1: flash-controller at 1e630000 {
- reg = < 0x1e630000 0xc4
- 0x30000000 0x08000000 >;
+ reg = <0x1e630000 0xc4>, <0x30000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-spi";
clocks = <&scu ASPEED_CLK_AHB>;
num-cs = <2>;
status = "disabled";
+
flash at 0 {
- reg = < 0 >;
+ reg = <0>;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 1 {
- reg = < 1 >;
+ reg = <1>;
compatible = "jedec,spi-nor";
status = "disabled";
};
};
spi2: flash-controller at 1e631000 {
- reg = < 0x1e631000 0xc4
- 0x50000000 0x08000000 >;
+ reg = <0x1e631000 0xc4>, <0x50000000 0x10000000>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "aspeed,ast2600-spi";
clocks = <&scu ASPEED_CLK_AHB>;
num-cs = <3>;
status = "disabled";
+
flash at 0 {
- reg = < 0 >;
+ reg = <0>;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 1 {
- reg = < 1 >;
+ reg = <1>;
compatible = "jedec,spi-nor";
status = "disabled";
};
+
flash at 2 {
- reg = < 2 >;
+ reg = <2>;
compatible = "jedec,spi-nor";
status = "disabled";
};
--
2.25.1
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