[PATCH] arm64: zynqmp: add ref_clk property for REFCLKPER calculation

Michal Simek michal.simek at amd.com
Tue Aug 23 15:03:31 CEST 2022


From: Piyush Mehta <piyush.mehta at amd.com>

Added ref_clk 'ref' property for GUCTL_REFCLKPER and GFLADJ_REFCLK_FLADJ
calculation. This property configure correct value for SOF/ITP counter
and period of ref_clk.
This patch adds 'ref' property for both dwc3_0 and dwc3_1 cores.

Signed-off-by: Piyush Mehta <piyush.mehta at amd.com>
Signed-off-by: Michal Simek <michal.simek at amd.com>
---

 arch/arm/dts/zynqmp-clk-ccf.dtsi | 8 ++++++++
 arch/arm/dts/zynqmp.dtsi         | 2 ++
 2 files changed, 10 insertions(+)

diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi
index 7b09d7515186..b99eb07b00a0 100644
--- a/arch/arm/dts/zynqmp-clk-ccf.dtsi
+++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi
@@ -260,11 +260,19 @@
 	assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
 };
 
+&dwc3_0 {
+	clocks = <&zynqmp_clk USB3_DUAL_REF>;
+};
+
 &usb1 {
 	clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
 	assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>;
 };
 
+&dwc3_1 {
+	clocks = <&zynqmp_clk USB3_DUAL_REF>;
+};
+
 &watchdog0 {
 	clocks = <&zynqmp_clk WDT>;
 };
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 2aaec6cf5a15..f4184f79a577 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -869,6 +869,7 @@
 				iommus = <&smmu 0x860>;
 				snps,quirk-frame-length-adjustment = <0x20>;
 				snps,refclk_fladj;
+				clock-names = "ref";
 				snps,enable_guctl1_resume_quirk;
 				snps,enable_guctl1_ipd_quirk;
 				snps,xhci-stream-quirk;
@@ -900,6 +901,7 @@
 				iommus = <&smmu 0x861>;
 				snps,quirk-frame-length-adjustment = <0x20>;
 				snps,refclk_fladj;
+				clock-names = "ref";
 				snps,enable_guctl1_resume_quirk;
 				snps,enable_guctl1_ipd_quirk;
 				snps,xhci-stream-quirk;
-- 
2.36.1



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