[PATCH] spl: introduce SPL_XIP to config

[Sean Anderson]

On 8/26/22 4:44 AM, Nikita Shubin wrote:
> From: Nikita Shubin <n.shubin at yadro.com>
> 
> U-Boot and SPL don't necessary share the same location, so we might end
> with U-Boot SPL in read-only memory (XIP) and U-Boot in read-write memory.
> 
> In case of non XIP boot mode, we rely on such variables as "hart_lottery"
> and "available_harts_lock" which we use as atomics.
> 
> The problem is that CONFIG_XIP also propagate to main U-Boot, not only SPL,
> so we need CONFIG_SPL_XIP to distinguish SPL XIP from other XIP modes.
> 
> This adds an option special for SPL to behave it in XIP manner and we don't
> use hart_lottery and available_harts_lock, during start proccess.
> 
> Signed-off-by: Nikita Shubin <n.shubin at yadro.com>
> ---
> rfc->v0:
> Sean Anderson:
> 	- replace defined with CONFIG_IS_ENABLED
> 	- add proper description to KConfig
> ---
>   arch/riscv/cpu/cpu.c                 | 2 +-
>   arch/riscv/cpu/start.S               | 4 ++--
>   arch/riscv/include/asm/global_data.h | 2 +-
>   arch/riscv/lib/asm-offsets.c         | 2 +-
>   arch/riscv/lib/smp.c                 | 2 +-
>   common/spl/Kconfig                   | 7 +++++++
>   6 files changed, 13 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
> index 9f5fa0bcb3..5d8163b19f 100644
> --- a/arch/riscv/cpu/cpu.c
> +++ b/arch/riscv/cpu/cpu.c
> @@ -19,7 +19,7 @@
>    * The variables here must be stored in the data section since they are used
>    * before the bss section is available.
>    */
> -#ifndef CONFIG_XIP
> +#if !CONFIG_IS_ENABLED(XIP)
>   u32 hart_lottery __section(".data") = 0;
>   
>   /*
> diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
> index ac81783a90..c3c859e667 100644
> --- a/arch/riscv/cpu/start.S
> +++ b/arch/riscv/cpu/start.S
> @@ -122,7 +122,7 @@ call_board_init_f_0:
>   call_harts_early_init:
>   	jal	harts_early_init
>   
> -#ifndef CONFIG_XIP
> +#if !CONFIG_IS_ENABLED(XIP)
>   	/*
>   	 * Pick hart to initialize global data and run U-Boot. The other harts
>   	 * wait for initialization to complete.
> @@ -150,7 +150,7 @@ call_harts_early_init:
>   	/* save the boot hart id to global_data */
>   	SREG	tp, GD_BOOT_HART(gp)
>   
> -#ifndef CONFIG_XIP
> +#if !CONFIG_IS_ENABLED(XIP)
>   	la	t0, available_harts_lock
>   	amoswap.w.rl zero, zero, 0(t0)
>   
> diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h
> index 9a146d1d49..a4d3cf430b 100644
> --- a/arch/riscv/include/asm/global_data.h
> +++ b/arch/riscv/include/asm/global_data.h
> @@ -30,7 +30,7 @@ int iccm[CONFIG_NR_CPUS];
>   #if CONFIG_IS_ENABLED(SMP)
>   	struct ipi_data ipi[CONFIG_NR_CPUS];
>   #endif
> -#ifndef CONFIG_XIP
> +#if !CONFIG_IS_ENABLED(XIP)
>   	ulong available_harts;
>   #endif
>   };
> diff --git a/arch/riscv/lib/asm-offsets.c b/arch/riscv/lib/asm-offsets.c
> index f1fe089b3d..c4f48c8373 100644
> --- a/arch/riscv/lib/asm-offsets.c
> +++ b/arch/riscv/lib/asm-offsets.c
> @@ -16,7 +16,7 @@ int main(void)
>   {
>   	DEFINE(GD_BOOT_HART, offsetof(gd_t, arch.boot_hart));
>   	DEFINE(GD_FIRMWARE_FDT_ADDR, offsetof(gd_t, arch.firmware_fdt_addr));
> -#ifndef CONFIG_XIP
> +#if !CONFIG_IS_ENABLED(XIP)
>   	DEFINE(GD_AVAILABLE_HARTS, offsetof(gd_t, arch.available_harts));
>   #endif
>   
> diff --git a/arch/riscv/lib/smp.c b/arch/riscv/lib/smp.c
> index ba992100ad..f8b756291f 100644
> --- a/arch/riscv/lib/smp.c
> +++ b/arch/riscv/lib/smp.c
> @@ -45,7 +45,7 @@ static int send_ipi_many(struct ipi_data *ipi, int wait)
>   			continue;
>   		}
>   
> -#ifndef CONFIG_XIP
> +#if !CONFIG_IS_ENABLED(XIP)
>   		/* skip if hart is not available */
>   		if (!(gd->arch.available_harts & (1 << reg)))
>   			continue;
> diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> index 07c03d611d..b3719f9626 100644
> --- a/common/spl/Kconfig
> +++ b/common/spl/Kconfig
> @@ -27,6 +27,13 @@ config SPL_FRAMEWORK
>   	  supports MMC, NAND and YMODEM and other methods loading of U-Boot
>   	  and the Linux Kernel.  If unsure, say Y.
>   
> +config SPL_XIP
> +	bool "Enable XIP mode for SPL"
> +	help
> +	  If SPL starts in read-only memory (XIP for example) then we shouldn't
> +	  rely on lock variables (for example hart_lottery and available_harts_lock),
> +	  this affects only SPL, other stages should proceed as non-XIP.
> +

Kconfig descriptions should tell you what should happen when you enable this config.
So the way you have worded this is strange; I would expect something more like

Support booting SPL from read-only memory (such as XIP). Don't rely on lock variables
(for example hart_lottery and available_harts_lock) since they cannot be modified.

The rest looks good.

--Sean

>   config SPL_FRAMEWORK_BOARD_INIT_F
>   	bool "Define a generic function board_init_f"
>   	depends on SPL_FRAMEWORK
>