[PATCH 1/1] drivers:spi:fix some typos
Pengfei Fan
fanpengfei1 at eswincomputing.com
Fri Dec 2 07:31:41 CET 2022
Fix some typos in spi drivers
Signed-off-by: Pengfei Fan <fanpengfei1 at eswincomputing.com>
---
drivers/spi/bcm63xx_hsspi.c | 2 +-
drivers/spi/cadence_qspi.c | 2 +-
drivers/spi/fsl_dspi.c | 4 ++--
drivers/spi/mtk_snfi_spi.c | 4 ++--
drivers/spi/mvebu_a3700_spi.c | 2 +-
drivers/spi/omap3_spi.c | 2 +-
drivers/spi/rk_spi.c | 2 +-
drivers/spi/sh_qspi.c | 2 +-
drivers/spi/spi-aspeed-smc.c | 4 ++--
drivers/spi/spi-qup.c | 2 +-
drivers/spi/spi-sifive.c | 2 +-
11 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/spi/bcm63xx_hsspi.c b/drivers/spi/bcm63xx_hsspi.c
index 47002f8b56..4d714adc4a 100644
--- a/drivers/spi/bcm63xx_hsspi.c
+++ b/drivers/spi/bcm63xx_hsspi.c
@@ -210,7 +210,7 @@ static void bcm63xx_hsspi_deactivate_cs(struct bcm63xx_hsspi_priv *priv)
* claimed. This way, the dummy CS is restored to its inactive value when
* transfers are issued and the desired CS is preserved in its active value
* all the time. This hack is also used in the upstream linux driver and
- * allows keeping CS active between trasnfers even if the HW doesn't give
+ * allows keeping CS active between transfers even if the HW doesn't give
* this possibility.
*/
static int bcm63xx_hsspi_xfer(struct udevice *dev, unsigned int bitlen,
diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index ab0a681c83..973f455e23 100644
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -392,7 +392,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
plat->is_dma = dev_read_bool(bus, "cdns,is-dma");
- /* All other paramters are embedded in the child node */
+ /* All other parameters are embedded in the child node */
subnode = dev_read_first_subnode(bus);
if (!ofnode_valid(subnode)) {
printf("Error: subnode with SPI flash config missing!\n");
diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index 62444e408a..8e5cc5552f 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -491,7 +491,7 @@ static int fsl_dspi_probe(struct udevice *bus)
dm_spi_bus = dev_get_uclass_priv(bus);
- /* cpu speical pin muxing configure */
+ /* cpu special pin muxing configure */
cpu_dspi_port_conf();
/* get input clk frequency */
@@ -600,7 +600,7 @@ static int fsl_dspi_of_to_plat(struct udevice *bus)
plat->speed_hz = fdtdec_get_int(blob,
node, "spi-max-frequency", FSL_DSPI_DEFAULT_SCK_FREQ);
- debug("DSPI: regs=%pa, max-frequency=%d, endianess=%s, num-cs=%d\n",
+ debug("DSPI: regs=%pa, max-frequency=%d, endianness=%s, num-cs=%d\n",
&plat->regs_addr, plat->speed_hz,
plat->flags & DSPI_FLAG_REGMAP_ENDIAN_BIG ? "be" : "le",
plat->num_chipselect);
diff --git a/drivers/spi/mtk_snfi_spi.c b/drivers/spi/mtk_snfi_spi.c
index 5ea62776b4..3decb3744d 100644
--- a/drivers/spi/mtk_snfi_spi.c
+++ b/drivers/spi/mtk_snfi_spi.c
@@ -153,7 +153,7 @@ static void mtk_snfi_copy_to_gpram(struct mtk_snfi_priv *priv,
/*
* The output data will always be copied to the beginning of
- * the GPRAM. Uses word write for better performace.
+ * the GPRAM. Uses word write for better performance.
*
* Trailing bytes in the last word are not cared.
*/
@@ -180,7 +180,7 @@ static void mtk_snfi_copy_from_gpram(struct mtk_snfi_priv *priv, u8 *cache,
/*
* Read aligned data from GPRAM to buffer first.
- * Uses word read for better performace.
+ * Uses word read for better performance.
*/
i = 0;
while (pos < end) {
diff --git a/drivers/spi/mvebu_a3700_spi.c b/drivers/spi/mvebu_a3700_spi.c
index b1dce048ad..52882e8b26 100644
--- a/drivers/spi/mvebu_a3700_spi.c
+++ b/drivers/spi/mvebu_a3700_spi.c
@@ -84,7 +84,7 @@ static void spi_cs_deactivate(struct mvebu_spi_plat *plat, int cs)
* The XFER_RDY flag is checked every time before accessing SPI_DOUT
* and SPI_DIN register.
*
- * The number of transfers to be triggerred is decided by @bytelen.
+ * The number of transfers to be triggered is decided by @bytelen.
*
* Return: 0 - cool
* -ETIMEDOUT - XFER_RDY flag timeout
diff --git a/drivers/spi/omap3_spi.c b/drivers/spi/omap3_spi.c
index ea38a0ffba..1cbb5d46fd 100644
--- a/drivers/spi/omap3_spi.c
+++ b/drivers/spi/omap3_spi.c
@@ -142,7 +142,7 @@ static int omap3_spi_read(struct omap3_spi_priv *priv, unsigned int len,
}
}
- /* Disable the channel to prevent furher receiving */
+ /* Disable the channel to prevent further receiving */
if (i == (len - 1))
omap3_spi_set_enable(priv, OMAP3_MCSPI_CHCTRL_DIS);
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index cb80be77ae..66b20fce9b 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -485,7 +485,7 @@ static int rockchip_spi_xfer(struct udevice *dev, unsigned int bitlen,
/*
* In case that there's a transmit-component, we need to wait
* until the control goes idle before we can disable the SPI
- * control logic (as this will implictly flush the FIFOs).
+ * control logic (as this will implicitly flush the FIFOs).
*/
if (out) {
ret = rkspi_wait_till_not_busy(regs);
diff --git a/drivers/spi/sh_qspi.c b/drivers/spi/sh_qspi.c
index 5ba8a8ea79..23af77f3df 100644
--- a/drivers/spi/sh_qspi.c
+++ b/drivers/spi/sh_qspi.c
@@ -160,7 +160,7 @@ static int sh_qspi_xfer_common(struct sh_qspi_slave *ss, unsigned int bitlen,
}
if (bitlen % 8) {
- printf("%s: bitlen is not 8bit alined %d", __func__, bitlen);
+ printf("%s: bitlen is not 8bit aligned %d", __func__, bitlen);
return 1;
}
diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
index a3c9633382..4b6ea9f8e9 100644
--- a/drivers/spi/spi-aspeed-smc.c
+++ b/drivers/spi/spi-aspeed-smc.c
@@ -270,7 +270,7 @@ static int ast2500_adjust_decoded_size(struct udevice *bus)
flashes[cs].ahb_decoded_sz = priv->info->min_decoded_sz;
/*
- * If commnad mode or normal mode is used, the start address of a
+ * If command mode or normal mode is used, the start address of a
* decoded range should be multiple of its related flash size.
* Namely, the total decoded size from flash 0 to flash N should
* be multiple of the size of flash (N + 1).
@@ -404,7 +404,7 @@ static int ast2600_adjust_decoded_size(struct udevice *bus)
flashes[cs].ahb_decoded_sz = 0;
/*
- * If commnad mode or normal mode is used, the start address of a
+ * If command mode or normal mode is used, the start address of a
* decoded range should be multiple of its related flash size.
* Namely, the total decoded size from flash 0 to flash N should
* be multiple of the size of flash (N + 1).
diff --git a/drivers/spi/spi-qup.c b/drivers/spi/spi-qup.c
index cdea5405f6..7b64532e50 100644
--- a/drivers/spi/spi-qup.c
+++ b/drivers/spi/spi-qup.c
@@ -233,7 +233,7 @@ static unsigned char qup_spi_read_byte(struct udevice *dev)
}
/*
- * Function to check wheather Input or Output FIFO
+ * Function to check whether Input or Output FIFO
* has data to be serviced
*/
static int qup_spi_check_fifo_status(struct udevice *dev, u32 reg_addr)
diff --git a/drivers/spi/spi-sifive.c b/drivers/spi/spi-sifive.c
index 0a00df0ac7..ea372a05f8 100644
--- a/drivers/spi/spi-sifive.c
+++ b/drivers/spi/spi-sifive.c
@@ -350,7 +350,7 @@ static int sifive_spi_set_speed(struct udevice *bus, uint speed)
if (speed > spi->freq)
speed = spi->freq;
- /* Cofigure max speed */
+ /* Configure max speed */
scale = (DIV_ROUND_UP(spi->freq >> 1, speed) - 1)
& SIFIVE_SPI_SCKDIV_DIV_MASK;
writel(scale, spi->regs + SIFIVE_SPI_REG_SCKDIV);
--
2.31.1.windows.1
More information about the U-Boot
mailing list