[PATCH v5 0/3] Add riscv semihosting support in u-boot

Bin Meng bmeng.cn at gmail.com
Sat Dec 3 07:01:51 CET 2022


Hi Kautuk,

On Sat, Dec 3, 2022 at 12:28 PM Bin Meng <bmeng.cn at gmail.com> wrote:
>
> On Tue, Nov 29, 2022 at 2:58 PM Kautuk Consul <kconsul at ventanamicro.com> wrote:
> >
> > I have tested it both on Qemu and Ventana's internal simulator.
>
> How to verify this? I used your instructions and U-Boot says: No match
> for driver 'serial_semihosting'
>
> U-Boot 2023.01-rc2-00113-g2a4accaf5e (Dec 03 2022 - 12:20:20 +0800)
> CPU: rv64imafdch_zicsr_zifencei_zihintpause_zba_zbb_zbc_zbs_sstc
> Model: riscv-virtio,qemu
> DRAM: 256 MiB
> No match for driver 'serial_semihosting'
> Some drivers were not found
> Core: 25 devices, 12 uclasses, devicetree: board
> Flash: 32 MiB
> Loading Environment from nowhere... OK
> In: serial at 10000000
> Out: serial at 10000000
> Err: serial at 10000000
> Net: No ethernet found.
> Working FDT set to 8f734950
> Hit any key to stop autoboot: 0
> =>
>
> >
> > On Tue, Nov 29, 2022 at 12:06 PM Bin Meng <bmeng.cn at gmail.com> wrote:
> >>
> >> Hi Kautuk,
> >>
> >> On Tue, Nov 29, 2022 at 2:29 PM Kautuk Consul <kconsul at ventanamicro.com> wrote:
> >> >
> >> > Hi,
> >> >
> >> > Can someone pick this patchset up ?
> >> >
> >> > It has been reviewed and there has been no comment on this in recent days.
> >> >
> >> > Thanks.
> >> >
> >> > On Fri, Sep 23, 2022 at 12:33 PM Kautuk Consul <kconsul at ventanamicro.com> wrote:
> >> >>
> >> >> Semihosting is a mechanism that enables code running on
> >> >> a target to communicate and use the Input/Output
> >> >> facilities on a host computer that is running a debugger.
> >> >> This patchset adds support for semihosting in u-boot
> >> >> for RISCV64 targets.
> >> >>
> >> >> CHANGES since v4:
> >> >> -       Check arch dependencies for SEMIHOSTING as well as SPL_SEMIHOSTING
> >> >>         config options as per Sean's comment.
> >> >> -       arch/riscv/lib/interrupts.c: Check for post and pre instructions
> >> >>         of the ebreak statement whether they are as per the RISCV
> >> >>         semihosting specification. Only then do a disable_semihosting
> >> >>         and epc += 4 and return.
> >> >>
> >> >> Compilation and test commands for SPL and S-mode configurations
> >> >> =================================================================
> >> >>
> >> >> U-Boot S-mode on QEMU virt
> >> >> ----------------------------
> >> >> // Compilation of S-mode u-boot
> >> >> ARCH=riscv
> >> >> CROSS_COMPILE=riscv64-unknown-linux-gnu-
> >> >> make qemu-riscv64_smode_defconfig
> >> >> make
> >> >> // Run riscv 64-bit u-boot with opensbi on qemu
> >> >> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> >> >> opensbi/build/platform/generic/firmware/fw_jump.bin -kernel\
> >> >> u-boot/u-boot.bin

It turns out your instructions missed "-semihosting" in the QEMU command line.

With that I can see U-Boot boots with the serial_semihosting driver.

> >> >>
> >> >> U-Boot SPL on QEMU virt
> >> >> ------------------------
> >> >> // Compilation of u-boot-spl
> >> >> ARCH=riscv
> >> >> CROSS_COMPILE=riscv64-unknown-linux-gnu-
> >> >> make qemu-riscv64_spl_defconfig
> >> >> make OPENSBI=opensbi/build/platform/generic/firmware/fw_dynamic.bin
> >> >> // Run 64-bit u-boot-spl in qemu
> >> >> qemu-system-riscv64 -M virt -m 256M -display none -serial stdio -bios\
> >> >> u-boot/spl/u-boot-spl.bin -device\
> >> >> loader,file=u-boot/u-boot.itb,addr=0x80200000
> >> >>
> >>
> >> Do you have instructions on how to actually test semihosting? Does it
> >> require a JTAG debugger? But I see you are using QEMU?
> >>
>

Regards,
Bin


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