[PATCH v4 3/3] arm: dts: stm32mp13: add support of RCC driver
Patrice CHOTARD
patrice.chotard at foss.st.com
Wed Dec 7 16:51:50 CET 2022
On 12/7/22 16:47, Patrice CHOTARD wrote:
>
>
> On 11/24/22 11:36, Gabriel Fernandez wrote:
>> Adds support of Clock and Reset drivers for STM32MP13 platform.
>>
>> Signed-off-by: Gabriel Fernandez <gabriel.fernandez at foss.st.com>
>> Reviewed-by: Patrick Delaunay <patrick.delaunay at foss.st.com>
>>
>> ---
>>
>> (no changes since v2)
>>
>> Changes in v2:
>> - missing support of CRYP1 clock
>>
>> arch/arm/dts/stm32mp13-u-boot.dtsi | 4 +
>> arch/arm/dts/stm32mp131.dtsi | 119 +++++++++++------------------
>> arch/arm/dts/stm32mp133.dtsi | 4 +-
>> arch/arm/dts/stm32mp13xc.dtsi | 3 +-
>> arch/arm/dts/stm32mp13xf.dtsi | 3 +-
>> 5 files changed, 54 insertions(+), 79 deletions(-)
>>
>> diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi b/arch/arm/dts/stm32mp13-u-boot.dtsi
>> index 47a43649bb..3730f474b2 100644
>> --- a/arch/arm/dts/stm32mp13-u-boot.dtsi
>> +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
>> @@ -92,6 +92,10 @@
>> u-boot,dm-pre-reloc;
>> };
>>
>> +&rcc {
>> + u-boot,dm-pre-reloc;
>> +};
>> +
>> &scmi {
>> u-boot,dm-pre-reloc;
>> };
>> diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi
>> index a1c6d0d00b..d893bc24b4 100644
>> --- a/arch/arm/dts/stm32mp131.dtsi
>> +++ b/arch/arm/dts/stm32mp131.dtsi
>> @@ -4,6 +4,8 @@
>> * Author: Alexandre Torgue <alexandre.torgue at foss.st.com> for STMicroelectronics.
>> */
>> #include <dt-bindings/interrupt-controller/arm-gic.h>
>> +#include <dt-bindings/clock/stm32mp13-clks.h>
>> +#include <dt-bindings/reset/stm32mp13-resets.h>
>>
>> / {
>> #address-cells = <1>;
>> @@ -52,62 +54,6 @@
>> };
>> };
>>
>> - clocks {
>> - clk_axi: clk-axi {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <266500000>;
>> - };
>> -
>> - clk_hse: clk-hse {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <24000000>;
>> - };
>> -
>> - clk_hsi: clk-hsi {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <64000000>;
>> - };
>> -
>> - clk_lsi: clk-lsi {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <32000>;
>> - };
>> -
>> - clk_pclk3: clk-pclk3 {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <104438965>;
>> - };
>> -
>> - clk_pclk4: clk-pclk4 {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <133250000>;
>> - };
>> -
>> - clk_pll4_p: clk-pll4_p {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <50000000>;
>> - };
>> -
>> - clk_pll4_r: clk-pll4_r {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <99000000>;
>> - };
>> -
>> - clk_rtc_k: clk-rtc-k {
>> - #clock-cells = <0>;
>> - compatible = "fixed-clock";
>> - clock-frequency = <32768>;
>> - };
>> - };
>> -
>> intc: interrupt-controller at a0021000 {
>> compatible = "arm,cortex-a7-gic";
>> #interrupt-cells = <3>;
>> @@ -155,7 +101,8 @@
>> compatible = "st,stm32h7-uart";
>> reg = <0x40010000 0x400>;
>> interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&clk_hsi>;
>> + clocks = <&rcc UART4_K>;
>> + resets = <&rcc UART4_R>;
>> status = "disabled";
>> };
>>
>> @@ -170,7 +117,8 @@
>> <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc DMA1>;
>> + resets = <&rcc DMA1_R>;
>> #dma-cells = <4>;
>> st,mem2mem;
>> dma-requests = <8>;
>> @@ -187,7 +135,8 @@
>> <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc DMA2>;
>> + resets = <&rcc DMA2_R>;
>> #dma-cells = <4>;
>> st,mem2mem;
>> dma-requests = <8>;
>> @@ -196,13 +145,29 @@
>> dmamux1: dma-router at 48002000 {
>> compatible = "st,stm32h7-dmamux";
>> reg = <0x48002000 0x40>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc DMAMUX1>;
>> + resets = <&rcc DMAMUX1_R>;
>> #dma-cells = <3>;
>> dma-masters = <&dma1 &dma2>;
>> dma-requests = <128>;
>> dma-channels = <16>;
>> };
>>
>> + rcc: rcc at 50000000 {
>> + compatible = "st,stm32mp13-rcc", "syscon";
>> + reg = <0x50000000 0x1000>;
>> + #clock-cells = <1>;
>> + #reset-cells = <1>;
>> + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> + clock-names = "hse", "hsi", "csi", "lse", "lsi";
>> + clocks = <&scmi_clk CK_SCMI_HSE>,
>> + <&scmi_clk CK_SCMI_HSI>,
>> + <&scmi_clk CK_SCMI_CSI>,
>> + <&scmi_clk CK_SCMI_LSE>,
>> + <&scmi_clk CK_SCMI_LSI>;
>> + };
>> +
>> exti: interrupt-controller at 5000d000 {
>> compatible = "st,stm32mp13-exti", "syscon";
>> interrupt-controller;
>> @@ -213,14 +178,14 @@
>> syscfg: syscon at 50020000 {
>> compatible = "st,stm32mp157-syscfg", "syscon";
>> reg = <0x50020000 0x400>;
>> - clocks = <&clk_pclk3>;
>> + clocks = <&rcc SYSCFG>;
>> };
>>
>> mdma: dma-controller at 58000000 {
>> compatible = "st,stm32h7-mdma";
>> reg = <0x58000000 0x1000>;
>> interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc MDMA>;
>> #dma-cells = <5>;
>> dma-channels = <32>;
>> dma-requests = <48>;
>> @@ -232,8 +197,9 @@
>> reg = <0x58005000 0x1000>, <0x58006000 0x1000>;
>> interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
>> interrupt-names = "cmd_irq";
>> - clocks = <&clk_pll4_p>;
>> + clocks = <&rcc SDMMC1_K>;
>> clock-names = "apb_pclk";
>> + resets = <&rcc SDMMC1_R>;
>> cap-sd-highspeed;
>> cap-mmc-highspeed;
>> max-frequency = <130000000>;
>> @@ -246,8 +212,10 @@
>> reg = <0x58007000 0x1000>, <0x58008000 0x1000>;
>> interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
>> interrupt-names = "cmd_irq";
>> - clocks = <&clk_pll4_p>;
>> + clocks = <&rcc SDMMC2_K>;
>> clock-names = "apb_pclk";
>> + resets = <&rcc SDMMC2_R>;
>> +
>> cap-sd-highspeed;
>> cap-mmc-highspeed;
>> max-frequency = <130000000>;
>> @@ -257,7 +225,7 @@
>> iwdg2: watchdog at 5a002000 {
>> compatible = "st,stm32mp1-iwdg";
>> reg = <0x5a002000 0x400>;
>> - clocks = <&clk_pclk4>, <&clk_lsi>;
>> + clocks = <&rcc IWDG2>, <&scmi_clk CK_SCMI_LSI>;
>> clock-names = "pclk", "lsi";
>> status = "disabled";
>> };
>> @@ -266,7 +234,8 @@
>> compatible = "st,stm32mp1-rtc";
>> reg = <0x5c004000 0x400>;
>> interrupts-extended = <&exti 19 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&clk_pclk4>, <&clk_rtc_k>;
>> + clocks = <&scmi_clk CK_SCMI_RTCAPB>,
>> + <&scmi_clk CK_SCMI_RTC>;
>> clock-names = "pclk", "rtc_ck";
>> status = "disabled";
>> };
>> @@ -307,7 +276,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x0 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOA>;
>> st,bank-name = "GPIOA";
>> ngpios = <16>;
>> gpio-ranges = <&pinctrl 0 0 16>;
>> @@ -319,7 +288,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x1000 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOB>;
>> st,bank-name = "GPIOB";
>> ngpios = <16>;
>> gpio-ranges = <&pinctrl 0 16 16>;
>> @@ -331,7 +300,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x2000 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOC>;
>> st,bank-name = "GPIOC";
>> ngpios = <16>;
>> gpio-ranges = <&pinctrl 0 32 16>;
>> @@ -343,7 +312,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x3000 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOD>;
>> st,bank-name = "GPIOD";
>> ngpios = <16>;
>> gpio-ranges = <&pinctrl 0 48 16>;
>> @@ -355,7 +324,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x4000 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOE>;
>> st,bank-name = "GPIOE";
>> ngpios = <16>;
>> gpio-ranges = <&pinctrl 0 64 16>;
>> @@ -367,7 +336,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x5000 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOF>;
>> st,bank-name = "GPIOF";
>> ngpios = <16>;
>> gpio-ranges = <&pinctrl 0 80 16>;
>> @@ -379,7 +348,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x6000 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOG>;
>> st,bank-name = "GPIOG";
>> ngpios = <16>;
>> gpio-ranges = <&pinctrl 0 96 16>;
>> @@ -391,7 +360,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x7000 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOH>;
>> st,bank-name = "GPIOH";
>> ngpios = <15>;
>> gpio-ranges = <&pinctrl 0 112 15>;
>> @@ -403,7 +372,7 @@
>> interrupt-controller;
>> #interrupt-cells = <2>;
>> reg = <0x8000 0x400>;
>> - clocks = <&clk_pclk4>;
>> + clocks = <&rcc GPIOI>;
>> st,bank-name = "GPIOI";
>> ngpios = <8>;
>> gpio-ranges = <&pinctrl 0 128 8>;
>> diff --git a/arch/arm/dts/stm32mp133.dtsi b/arch/arm/dts/stm32mp133.dtsi
>> index 0fb1386257..531c263c9f 100644
>> --- a/arch/arm/dts/stm32mp133.dtsi
>> +++ b/arch/arm/dts/stm32mp133.dtsi
>> @@ -15,7 +15,7 @@
>> interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
>> interrupt-names = "int0", "int1";
>> - clocks = <&clk_hse>, <&clk_pll4_r>;
>> + clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
>> clock-names = "hclk", "cclk";
>> bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
>> status = "disabled";
>> @@ -28,7 +28,7 @@
>> interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
>> <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
>> interrupt-names = "int0", "int1";
>> - clocks = <&clk_hse>, <&clk_pll4_r>;
>> + clocks = <&scmi_clk CK_SCMI_HSE>, <&rcc FDCAN_K>;
>> clock-names = "hclk", "cclk";
>> bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
>> status = "disabled";
>> diff --git a/arch/arm/dts/stm32mp13xc.dtsi b/arch/arm/dts/stm32mp13xc.dtsi
>> index fa6889e305..4d00e75928 100644
>> --- a/arch/arm/dts/stm32mp13xc.dtsi
>> +++ b/arch/arm/dts/stm32mp13xc.dtsi
>> @@ -10,7 +10,8 @@
>> compatible = "st,stm32mp1-cryp";
>> reg = <0x54002000 0x400>;
>> interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&clk_axi>;
>> + clocks = <&rcc CRYP1>;
>> + resets = <&rcc CRYP1_R>;
>> status = "disabled";
>> };
>> };
>> diff --git a/arch/arm/dts/stm32mp13xf.dtsi b/arch/arm/dts/stm32mp13xf.dtsi
>> index fa6889e305..4d00e75928 100644
>> --- a/arch/arm/dts/stm32mp13xf.dtsi
>> +++ b/arch/arm/dts/stm32mp13xf.dtsi
>> @@ -10,7 +10,8 @@
>> compatible = "st,stm32mp1-cryp";
>> reg = <0x54002000 0x400>;
>> interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
>> - clocks = <&clk_axi>;
>> + clocks = <&rcc CRYP1>;
>> + resets = <&rcc CRYP1_R>;
>> status = "disabled";
>> };
>> };
>
>
> Reviewed-by: Patrice Chotard <patrice.chotard at foss.st.com>
>
> Thanks
> Patrice
Applied to u-boot-stm/master
Thanks
Patrice
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