[PATCH V3 0/2] spi: cqspi: Fix register reads in STIG Mode

[Dhruva Gole]

Hi,

A Gentle reminder for this series.

On 25/11/22 11:29, Dhruva Gole wrote:
> Intent of these patches is to fix register reads in STIG mode and also
> use STIG mode while reading flash registers.
> Currently if you try to read a register while in STIG mode there is no
> support for ADDR and thus naturally a register never gets read from the
> flash.
> 
> This series supercedes the previously sent:
> https://lore.kernel.org/u-boot/20221115114926.174351-1-d-gole@ti.com/
> 
> Logs demonstrating the usage and working of QSPI-NOR Flash (Cypress
> s25hs512t) can be found on the link below:
> https://gist.github.com/DhruvaG2000/11e7b4ee6a381be9d86b69b2bc2616e4
> 
> [...]
> Dhruva Gole (2):
>    spi: cadence_qspi: setup ADDR Bits in cmd reads
>    spi: cadence_qspi: use STIG mode for small reads
> 
>   drivers/spi/cadence_qspi.c     |  8 +++++++-
>   drivers/spi/cadence_qspi_apb.c | 13 +++++++++++++
>   2 files changed, 20 insertions(+), 1 deletion(-)
> 

It's an important fix because without this reading flash registers is a
problem in some cases. I was unable to get one of the QSPI Flash from
Cypress working just because STIG read of registers was not supported.

It would be great if we could get this merged for the coming release.


-- 
Thanks and Regards,
Dhruva Gole