[PATCH 3/3] arm: uniphier: use DM_TIMER of arm a9 global timer
Dai Okamura
okamura.dai at socionext.com
Fri Dec 9 12:33:48 CET 2022
All uniphier v7 SoCs have cortex-a9 and use cortex-a9 global timer
in a simple implementation. Now DM_TIMER of it is available
on 35751c7f3f ("timer: sti: convert sti-timer to arm a9 global timer"),
so let's switch to it.
The old driver reads the lower 32bits of counter field
and sets the prescaler as 50 with PERIPHCLK(=50MHz),
so the global timer works as a 32-bit 1MHz timer.
The DM_TIMER uses the whole 64bits with no prescaler,
so the global timer works as a 64-bit PERIPHCLK timer.
CONFIG_SYS_HZ_CLOCK is set as the default PERIPHCLK frequency,
if there is no 'clocks' property in devicetree.
Signed-off-by: Dai Okamura <okamura.dai at socionext.com>
---
arch/arm/dts/uniphier-v7-u-boot.dtsi | 4 +++
arch/arm/mach-uniphier/Kconfig | 1 +
arch/arm/mach-uniphier/arm32/Makefile | 2 --
arch/arm/mach-uniphier/arm32/timer.c | 39 ---------------------------
configs/uniphier_v7_defconfig | 2 ++
include/configs/uniphier.h | 3 +--
6 files changed, 8 insertions(+), 43 deletions(-)
delete mode 100644 arch/arm/mach-uniphier/arm32/timer.c
diff --git a/arch/arm/dts/uniphier-v7-u-boot.dtsi b/arch/arm/dts/uniphier-v7-u-boot.dtsi
index 9459bf0377..603b33dd2b 100644
--- a/arch/arm/dts/uniphier-v7-u-boot.dtsi
+++ b/arch/arm/dts/uniphier-v7-u-boot.dtsi
@@ -2,6 +2,10 @@
soc {
u-boot,dm-pre-reloc;
+ timer at 60000200 {
+ u-boot,dm-pre-reloc;
+ };
+
serial at 54006800 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig
index 3a8eee7b84..e489eedec6 100644
--- a/arch/arm/mach-uniphier/Kconfig
+++ b/arch/arm/mach-uniphier/Kconfig
@@ -12,6 +12,7 @@ config ARCH_UNIPHIER_V7_MULTI
select ARMV7_NONSEC
select CPU_V7A
select CPU_V7_HAS_NONSEC
+ select ARM_GLOBAL_TIMER
config ARCH_UNIPHIER_V8_MULTI
bool "UniPhier V8 SoCs"
diff --git a/arch/arm/mach-uniphier/arm32/Makefile b/arch/arm/mach-uniphier/arm32/Makefile
index 3cd00b7e5e..b41aba7e29 100644
--- a/arch/arm/mach-uniphier/arm32/Makefile
+++ b/arch/arm/mach-uniphier/arm32/Makefile
@@ -8,5 +8,3 @@ obj-y += late_lowlevel_init.o
obj-y += cache-uniphier.o
obj-$(CONFIG_ARMV7_PSCI) += psci.o psci_smp.o
endif
-
-obj-y += timer.o
diff --git a/arch/arm/mach-uniphier/arm32/timer.c b/arch/arm/mach-uniphier/arm32/timer.c
deleted file mode 100644
index a40bdf1705..0000000000
--- a/arch/arm/mach-uniphier/arm32/timer.c
+++ /dev/null
@@ -1,39 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Copyright (C) 2012-2015 Masahiro Yamada <yamada.masahiro at socionext.com>
- */
-
-#include <config.h>
-#include <init.h>
-#include <linux/io.h>
-
-#include "arm-mpcore.h"
-
-#define PERIPHCLK (50 * 1000 * 1000) /* 50 MHz */
-#define PRESCALER ((PERIPHCLK) / (CONFIG_SYS_TIMER_RATE) - 1)
-
-static void *get_global_timer_base(void)
-{
- void *val;
-
- asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (val) : : "memory");
-
- return val + GLOBAL_TIMER_OFFSET;
-}
-
-unsigned long timer_read_counter(void)
-{
- /*
- * ARM 64bit Global Timer is too much for our purpose.
- * We use only lower 32 bit of the timer counter.
- */
- return readl(get_global_timer_base() + GTIMER_CNT_L);
-}
-
-int timer_init(void)
-{
- /* enable timer */
- writel(PRESCALER << 8 | 1, get_global_timer_base() + GTIMER_CTRL);
-
- return 0;
-}
diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig
index e3087a9109..591799ff35 100644
--- a/configs/uniphier_v7_defconfig
+++ b/configs/uniphier_v7_defconfig
@@ -13,6 +13,8 @@ CONFIG_SYS_LOAD_ADDR=0x85000000
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000
CONFIG_SYS_MONITOR_LEN=2097152
+CONFIG_TIMER=y
+CONFIG_SPL_TIMER=y
CONFIG_TIMESTAMP=y
# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set
CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot"
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 32b47db346..47a7408268 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -36,8 +36,7 @@
BOOT_TARGET_DEVICE_USB(func)
#if !defined(CONFIG_ARM64)
-/* Time clock 1MHz */
-#define CONFIG_SYS_TIMER_RATE 1000000
+#define CONFIG_SYS_HZ_CLOCK 50000000
#endif
#define CONFIG_SYS_NAND_REGS_BASE 0x68100000
--
2.35.1
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