[PATCH 2/5] arm64: zynqmp: Added GEM reset definitions

[Michal Simek]

The Cadence GEM/MACB driver now utilizes the platform-level reset on the
ZynqMP platform. Add reset definitions to the ZynqMP platform device
tree to allow this to be used.
Linux upstream commit (e461bd6f43f4e568f7436a8b6bc21c4ce6914c36).

Signed-off-by: Robert Hancock <robert.hancock at calian.com>
Signed-off-by: Michal Simek <michal.simek at amd.com>
---

https://lore.kernel.org/netdev/20220112181113.875567-4-robert.hancock@calian.com/
---
 arch/arm/dts/zynqmp.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 9434c48e4f59..e2eb27b3151e 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -540,6 +540,7 @@
 			iommus = <&smmu 0x874>;
 			power-domains = <&zynqmp_firmware PD_ETH_0>;
 			resets = <&zynqmp_reset ZYNQMP_RESET_GEM0>;
+			reset-names = "gem0_rst";
 		};
 
 		gem1: ethernet at ff0c0000 {
@@ -554,6 +555,7 @@
 			iommus = <&smmu 0x875>;
 			power-domains = <&zynqmp_firmware PD_ETH_1>;
 			resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;
+			reset-names = "gem1_rst";
 		};
 
 		gem2: ethernet at ff0d0000 {
@@ -568,6 +570,7 @@
 			iommus = <&smmu 0x876>;
 			power-domains = <&zynqmp_firmware PD_ETH_2>;
 			resets = <&zynqmp_reset ZYNQMP_RESET_GEM2>;
+			reset-names = "gem2_rst";
 		};
 
 		gem3: ethernet at ff0e0000 {
@@ -582,6 +585,7 @@
 			iommus = <&smmu 0x877>;
 			power-domains = <&zynqmp_firmware PD_ETH_3>;
 			resets = <&zynqmp_reset ZYNQMP_RESET_GEM3>;
+			reset-names = "gem3_rst";
 		};
 
 		gpio: gpio at ff0a0000 {
-- 
2.36.1