[PATCH 08/10] arm: imx: imx8m: Define trampoline location if PSCI provider

[Marek Vasut]

The common code used to bring up secondary cores requires a final
jump location to be stored in some sort of memory location, define
this memory location to be the start of OCRAM, since it is available.

Signed-off-by: Marek Vasut <marex at denx.de>
---
Cc: "Ariel D'Alessandro" <ariel.dalessandro at collabora.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx at nxp.com>
Cc: "Ying-Chun Liu (PaulLiu)" <paul.liu at linaro.org>
Cc: Adam Ford <aford173 at gmail.com>
Cc: Andrejs Cainikovs <andrejs.cainikovs at toradex.com>
Cc: Fabio Estevam <festevam at gmail.com>
Cc: Manoj Sai <abbaraju.manojsai at amarulasolutions.com>
Cc: Marcel Ziswiler <marcel.ziswiler at toradex.com>
Cc: Michael Trimarchi <michael at amarulasolutions.com>
Cc: Peng Fan <peng.fan at nxp.com>
Cc: Ricardo Salveti <ricardo at foundries.io>
Cc: Simon Glass <sjg at chromium.org>
Cc: Stefano Babic <sbabic at denx.de>
Cc: Tim Harvey <tharvey at gateworks.com>
Cc: Ye Li <ye.li at nxp.com>
---
 arch/arm/include/asm/arch-imx8m/imx-regs.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index cfd5479cd73..3034d280cc3 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -91,6 +91,10 @@
 #define IOMUXC_GPR_GPR1_GPR_ENET_QOS_INTF_SEL_MASK 0x70000
 #define FEC_QUIRK_ENET_MAC
 
+#ifdef CONFIG_ARMV8_PSCI	/* Final jump location */
+#define CPU_RELEASE_ADDR               0x900000
+#endif
+
 #define CAAM_ARB_BASE_ADDR              (0x00100000)
 #define CAAM_ARB_END_ADDR               (0x00107FFF)
 #define CAAM_IPS_BASE_ADDR              (0x30900000)
-- 
2.35.1