[PATCH] serial: Setup serial base and freq for zynq/zynqmp

Michal Simek monstr at monstr.eu
Mon Jun 6 09:38:29 CEST 2022


st 18. 5. 2022 v 12:58 odesílatel Michal Simek <monstr at monstr.eu> napsal:
>
> Setup default values for debug console, base address and frequency.
>
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
>
>  drivers/serial/Kconfig | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 26fa498bbbb7..f9db7860750b 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -502,6 +502,8 @@ config DEBUG_UART_BASE
>         depends on DEBUG_UART
>         default 0 if DEBUG_SBI_CONSOLE
>         default 0 if DEBUG_UART_SANDBOX
> +       default 0xff000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQMP
> +       default 0xe0000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQ
>         help
>           This is the base address of your UART for memory-mapped UARTs.
>
> @@ -514,6 +516,8 @@ config DEBUG_UART_CLOCK
>         default 0 if DEBUG_SBI_CONSOLE
>         default 0 if DEBUG_UART_SANDBOX
>         default 0 if DEBUG_MVEBU_A3700_UART
> +       default 100000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQMP
> +       default 50000000 if DEBUG_UART_ZYNQ && ARCH_ZYNQ
>         help
>           The UART input clock determines the speed of the internal UART
>           circuitry. The baud rate is derived from this by dividing the input
> --
> 2.36.0
>

Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs


More information about the U-Boot mailing list