[PATCH 38/49] ddr: imx9: enable Performance monitor counter

Peng Fan (OSS) peng.fan at oss.nxp.com
Mon Jun 6 13:24:10 CEST 2022


From: Ye Li <ye.li at nxp.com>

Add Kconfig for enabling reference events counter in DDRC performance
monitor by default

Signed-off-by: Ye Li <ye.li at nxp.com>
Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
 drivers/ddr/imx/imx9/Kconfig    | 6 ++++++
 drivers/ddr/imx/imx9/ddr_init.c | 4 ++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/ddr/imx/imx9/Kconfig b/drivers/ddr/imx/imx9/Kconfig
index a16ddc65e01..123ad173cfc 100644
--- a/drivers/ddr/imx/imx9/Kconfig
+++ b/drivers/ddr/imx/imx9/Kconfig
@@ -11,6 +11,12 @@ config IMX9_LPDDR4X
 	help
 	  Select the i.MX9 LPDDR4/4X driver support on i.MX9 SOC.
 
+config IMX9_DRAM_PM_COUNTER
+	bool "imx9 DDRC performance monitor counter"
+	default y
+	help
+	  Enable DDR controller performance monitor counter for reference events.
+
 config SAVED_DRAM_TIMING_BASE
 	hex "Define the base address for saved dram timing"
 	help
diff --git a/drivers/ddr/imx/imx9/ddr_init.c b/drivers/ddr/imx/imx9/ddr_init.c
index 16eac65105f..8b8ec7f8de3 100644
--- a/drivers/ddr/imx/imx9/ddr_init.c
+++ b/drivers/ddr/imx/imx9/ddr_init.c
@@ -112,6 +112,10 @@ int ddr_init(struct dram_timing_info *dram_timing)
 	ddrc_config(dram_timing->ddrc_cfg, dram_timing->ddrc_cfg_num);
 	debug("DDRINFO: ddrc config done\n");
 
+#ifdef CONFIG_IMX9_DRAM_PM_COUNTER
+	writel(0x200000, REG_DDR_DEBUG_19);
+#endif
+
 	check_dfi_init_complete();
 
 	regval = readl(REG_DDR_SDRAM_CFG);
-- 
2.36.0



More information about the U-Boot mailing list