[PATCH v4] imx: add i.MX8MN DDR3L evk board support

Heiko Thiery heiko.thiery at gmail.com
Wed Jun 15 08:23:31 CEST 2022


Hi Marek,

[SNIP]

> > diff --git a/board/freescale/imx8mn_evk/spl.c b/board/freescale/imx8mn_evk/spl.c
> > index 14cb51368f..0d9909a662 100644
> > --- a/board/freescale/imx8mn_evk/spl.c
> > +++ b/board/freescale/imx8mn_evk/spl.c
> > @@ -83,6 +83,15 @@ int power_init_board(void)
> >  #ifdef CONFIG_IMX8MN_LOW_DRIVE_MODE
> >         /* Set VDD_SOC/VDD_DRAM to 0.8v for low drive mode */
> >         pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x10);
> > +#elif defined(CONFIG_TARGET_IMX8MN_DDR3L_EVK)
> > +       /* Set VDD_SOC to 0.85v for DDR3L at 1600MTS */
> > +       pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14);
> > +
> > +       /* Disable the BUCK2 */
> > +       pmic_reg_write(dev, PCA9450_BUCK2CTRL, 0x48);
> > +
> > +       /* Set NVCC_DRAM to 1.35v */
> > +       pmic_reg_write(dev, PCA9450_BUCK6OUT, 0x1E);
> >  #else
>
> All this part is not done by the spl pmic driver?

I saw that you added the PCA9450 driver. Do you know if this
initialization can be done by the driver when CONFIG_SPL_DM_REGULATOR
is enabled? If I see this correctly, it can't be done. Is that
correct?

-- 
Heiko


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