[PATCH 2/3] arm64: zynqmp: Update tps53681 i2c address

[Michal Simek]

From: Michal Simek <michal.simek at xilinx.com>

TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address
is 7bit where c0h is 1100000 which is 0x60.

This will fix issues reported by make dtbs that 0xc0 is above 7bit regular
i2c address range.

Signed-off-by: Michal Simek <michal.simek at xilinx.com>
Signed-off-by: Michal Simek <michal.simek at amd.com>
---

 arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 4 ++--
 arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 4 ++--
 arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 4 ++--
 arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 4 ++--
 4 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
index ee530ba3e147..e00428351cbf 100644
--- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
@@ -260,9 +260,9 @@
 				reg = <0x45>;
 				shunt-resistor = <5000>;
 			};
-			tps53681 at c0 { /* u53 - FIXME name - don't know what it does - also vcc_io_soc */
+			tps53681 at 60 { /* u53 - 0xc0 - FIXME name - don't know what it does - also vcc_io_soc */
 				compatible = "ti,tps53681", "ti,tps53679";
-				reg = <0xc0>;
+				reg = <0x60>;
 			};
 		};
 		i2c at 3 { /* fmc1 via JA2G */
diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
index 7b3722f0808b..1fa023ffb13c 100644
--- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
@@ -247,9 +247,9 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			reg_vccint: tps53681 at c0 { /* u69 */
+			reg_vccint: tps53681 at 60 { /* u69 - 0xc0 */
 				compatible = "ti,tps53681", "ti,tps53679";
-				reg = <0xc0>;
+				reg = <0x60>;
 			};
 			reg_vcc_pmc: tps544 at 7 { /* u80 */
 				compatible = "ti,tps544b25";
diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
index 11b2a58a0f06..85790551d0b5 100644
--- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
@@ -239,9 +239,9 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			reg_vccint: tps53681 at c0 { /* u69 */
+			reg_vccint: tps53681 at 60 { /* u69 - 0xc0 */
 				compatible = "ti,tps53681", "ti,tps53679";
-				reg = <0xc0>;
+				reg = <0x60>;
 			};
 			reg_vcc_pmc: tps544 at 7 { /* u80 */
 				compatible = "ti,tps544b25";
diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
index db199c467b0d..21ef1a5e82b0 100644
--- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
@@ -239,9 +239,9 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <2>;
-			reg_vccint: tps53681 at c0 { /* u69 */
+			reg_vccint: tps53681 at 60 { /* u69 - 0xc0 */
 				compatible = "ti,tps53681", "ti,tps53679";
-				reg = <0xc0>;
+				reg = <0x60>;
 			};
 			reg_vcc_pmc: tps544 at 7 { /* u80 */
 				compatible = "ti,tps544b25";
-- 
2.36.1