[PATCH v4] imx: add i.MX8MN DDR3L evk board support

[Heiko Thiery]

Hi

[snip]

> > > >> > Maybe something like this should work. Now question is about should be
> > > >> > done in pre-reloc or not
> > > >>
> > > >> It took me a little while to understand what was meant by this. In the
> > > >> meantime I could
> > > >> change the PMIC/Regulator initialization to DT/DM and can make the setting so.
> > > >> What is not clear to me yet is at which point this should be done
> > > >> (regulators_enable_boot_on()). Currently I do it in the board/spl
> > > >> specific board_init_f().
> > > >>
> > > >> Do any of you have any advice here?
> > > >
> > > >
> > > > After having a discussion with you, i found that maybe i have some problem and some of the setting should be done before ddr inizialization. I will take a look on it on afternoon. I know marek was working on some way to probe driver during binding and we need even to be sure that this can happen before memory training.
> > > >
> > >
> > > Currently I added it in  board_init_f() right before spl_dram_init()
> > > [1] and it works. I also tried to put it in power_init_board() [2] but
> > > this does not work.
> > >
> > > [1] https://elixir.bootlin.com/u-boot/v2022.04/source/board/freescale/imx8mn_evk/spl.c#L162
> > > [2] https://elixir.bootlin.com/u-boot/v2022.04/source/board/freescale/imx8mn_evk/spl.c#L62
> >
> > Does it work if you mark pre-reoloc, pmic, i2c, and  pinctrl?
>
> I added on all nodes the u-boot,dm-pre-reloc but this does not help
> when trying to do the init in power_init_board().

This is how the dtsi looks like:

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "imx8mn-u-boot.dtsi"
#include "imx8mn-ddr4-evk-u-boot.dtsi"

&i2c1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};

&{/soc at 0/bus at 30800000} {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};

&{/soc at 0/bus at 30800000/i2c at 30a20000/pmic at 25} {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};

&{/soc at 0/bus at 30800000/i2c at 30a20000/pmic at 25/regulators} {
u-boot,dm-spl;
u-boot,dm-pre-reloc;

BUCK1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
BUCK4 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
BUCK5 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
BUCK6 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
LDO1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
LDO2 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
LDO3 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
LDO4 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
LDO5 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
};

&pinctrl_i2c1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};

&pinctrl_pmic {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};

&wdog1 {
u-boot,dm-spl;
};