[PATCH 1/2] microblaze: Convert axi timer to DM driver

[Ovidiu Panait]

Hi Michal,

On 6/8/22 13:38, Michal Simek wrote:
[...]
> diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
> index 7b8ab56ed323..44d1a81bad3d 100644
> --- a/drivers/timer/Kconfig
> +++ b/drivers/timer/Kconfig
> @@ -272,4 +272,12 @@ config IMX_GPT_TIMER
>            Select this to enable support for the timer found on
>            NXP i.MX devices.
>
> +config XILINX_TIMER
> +       bool "Xilinx timer support"
> +       depends on TIMER
> +       select REGMAP

Tested-by: Ovidiu Panait <ovidiu.panait at windriver.com>


I think the SPL select should also be added:

        select SPL_REGMAP if SPL


This will fix the spl link errors with the following config:

CONFIG_TIMER=y

CONFIG_SPL_TIMER=y

CONFIG_XILINX_TIMER=y

...

microblazeel-linux-ld.bfd: drivers/timer/xilinx-timer.o: in function 
`xilinx_timer_get_count':
drivers/timer/xilinx-timer.c:41: undefined reference to `regmap_read'
microblazeel-linux-ld.bfd: drivers/timer/xilinx-timer.o: in function 
`xilinx_timer_probe':
drivers/timer/xilinx-timer.c:52: undefined reference to `regmap_init_mem'
microblazeel-linux-ld.bfd: drivers/timer/xilinx-timer.c:58: undefined 
reference to `regmap_write'
microblazeel-linux-ld.bfd: drivers/timer/xilinx-timer.c:59: undefined 
reference to `regmap_write'
microblazeel-linux-ld.bfd: drivers/timer/xilinx-timer.c:60: undefined 
reference to `regmap_write'
make[1]: *** [scripts/Makefile.spl:525: spl/u-boot-spl] Error 1


Thanks,

Ovidiu

> +       help
> +         Select this to enable support for the timer found on
> +         any Xilinx boards (axi timer).
> +
>   endmenu
> diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
> index b2f002d59789..4d06375317e1 100644
> --- a/drivers/timer/Makefile
> +++ b/drivers/timer/Makefile
> @@ -27,3 +27,4 @@ obj-$(CONFIG_X86_TSC_TIMER)   += tsc_timer.o
>   obj-$(CONFIG_MTK_TIMER)                += mtk_timer.o
>   obj-$(CONFIG_MCHP_PIT64B_TIMER)        += mchp-pit64b-timer.o
>   obj-$(CONFIG_IMX_GPT_TIMER)    += imx-gpt-timer.o
> +obj-$(CONFIG_XILINX_TIMER)     += xilinx-timer.o
> diff --git a/drivers/timer/xilinx-timer.c b/drivers/timer/xilinx-timer.c
> new file mode 100644
> index 000000000000..75b4473b6397
> --- /dev/null
> +++ b/drivers/timer/xilinx-timer.c
> @@ -0,0 +1,82 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * (C) Copyright 2022 Advanced Micro Devices, Inc
> + * Michal Simek <michal.simek at amd.com>
> + *
> + * (C) Copyright 2007 Michal Simek
> + * Michal SIMEK <monstr at monstr.eu>
> + */
> +
> +#include <common.h>
> +#include <dm.h>
> +#include <timer.h>
> +#include <regmap.h>
> +#include <dm/device_compat.h>
> +
> +#define TIMER_ENABLE_ALL    0x400 /* ENALL */
> +#define TIMER_PWM           0x200 /* PWMA0 */
> +#define TIMER_INTERRUPT     0x100 /* T0INT */
> +#define TIMER_ENABLE        0x080 /* ENT0 */
> +#define TIMER_ENABLE_INTR   0x040 /* ENIT0 */
> +#define TIMER_RESET         0x020 /* LOAD0 */
> +#define TIMER_RELOAD        0x010 /* ARHT0 */
> +#define TIMER_EXT_CAPTURE   0x008 /* CAPT0 */
> +#define TIMER_EXT_COMPARE   0x004 /* GENT0 */
> +#define TIMER_DOWN_COUNT    0x002 /* UDT0 */
> +#define TIMER_CAPTURE_MODE  0x001 /* MDT0 */
> +
> +#define TIMER_CONTROL_OFFSET   0
> +#define TIMER_LOADREG_OFFSET   4
> +#define TIMER_COUNTER_OFFSET   8
> +
> +struct xilinx_timer_priv {
> +       struct regmap *regs;
> +};
> +
> +static u64 xilinx_timer_get_count(struct udevice *dev)
> +{
> +       struct xilinx_timer_priv *priv = dev_get_priv(dev);
> +       u32 value;
> +
> +       regmap_read(priv->regs, TIMER_COUNTER_OFFSET, &value);
> +
> +       return value;
> +}
> +
> +static int xilinx_timer_probe(struct udevice *dev)
> +{
> +       struct xilinx_timer_priv *priv = dev_get_priv(dev);
> +       int ret;
> +
> +       /* uc_priv->clock_rate has already clock rate */
> +       ret = regmap_init_mem(dev_ofnode(dev), &priv->regs);
> +       if (ret) {
> +               dev_dbg(dev, "failed to get regbase of timer\n");
> +               return ret;
> +       }
> +
> +       regmap_write(priv->regs, TIMER_LOADREG_OFFSET, 0);
> +       regmap_write(priv->regs, TIMER_CONTROL_OFFSET, TIMER_RESET);
> +       regmap_write(priv->regs, TIMER_CONTROL_OFFSET,
> +                    TIMER_ENABLE | TIMER_RELOAD);
> +
> +       return 0;
> +}
> +
> +static const struct timer_ops xilinx_timer_ops = {
> +       .get_count = xilinx_timer_get_count,
> +};
> +
> +static const struct udevice_id xilinx_timer_ids[] = {
> +       { .compatible = "xlnx,xps-timer-1.00.a" },
> +       {}
> +};
> +
> +U_BOOT_DRIVER(xilinx_timer) = {
> +       .name = "xilinx_timer",
> +       .id = UCLASS_TIMER,
> +       .of_match = xilinx_timer_ids,
> +       .priv_auto = sizeof(struct xilinx_timer_priv),
> +       .probe = xilinx_timer_probe,
> +       .ops = &xilinx_timer_ops,
> +};
> --
> 2.36.1
>