[PATCH v3] powerpc: mpc85xx: Set TEXT_BASE addresses to real base values

[Pali Rohár]

On Thursday 23 June 2022 08:34:58 Tom Rini wrote:
> On Thu, Jun 23, 2022 at 01:29:10PM +0200, Pali Rohár wrote:
> > On Thursday 16 June 2022 14:19:44 Pali Rohár wrote:
> > > Currently CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE addresses are
> > > manually increased by 0x1000 due to .bootpg section. This section has size
> > > of 0x1000 bytes and is manually put by linker script before .text section
> > > (and therefore before base address) when CONFIG_SYS_MPC85XX_NO_RESETVEC is
> > > set. Due to this fact lot of other config options are manually increased by
> > > 0x1000 value to make correct layout. Note that entry point is not on
> > > CONFIG_SPL_TEXT_BASE (image+0x1000) but it is really on address
> > > CONFIG_SPL_TEXT_BASE-0x1000 (means at the start of the image).
> > > 
> > > Cleanup handling of .bootpg section when CONFIG_SYS_MPC85XX_NO_RESETVEC is
> > > set. Put .bootpg code directly into .text section and move text base
> > > address to the start of .bootpg code. And finally remove +0x1000 value from
> > > lot of config options. With this removal custom PHDRS is not used anymore,
> > > so remove it too.
> > > 
> > > After this change entry point would be at CONFIG_SPL_TEXT_BASE and not at
> > > address -0x1000 anymore.
> > > 
> > > Tested on P2020 board with SPL and proper U-Boot.
> > > 
> > > Signed-off-by: Pali Rohár <pali at kernel.org>
> > > ---
> > 
> > PING???
> > 
> 
> Yes, I thought this was part of fsl-qoriq-2022-6-20-v2 but I see it is
> not.  I really don't want to see this have problems to apply, again.
> But it probably will if it's not picked up pretty much now.  Peng,
> should I grab this for next?  Otherwise someone is going to need to grab
> this, edit and recountdiff it for it to apply as it's really not fair to
> ask Pali to rebase it yet again if it doesn't and git also doesn't
> handle it on a rebase.
> 
> -- 
> Tom

Hm... So how to process this?