[PATCH 3/3] fpga: Convert FPGA_COUNT to Kconfig

Alexander Dahl ada at thorsis.com
Wed Jun 29 09:14:27 CEST 2022 

Besides the two obvious defconfigs, the option was set for all
defconfigs where corresponding header file includes
include/configs/socfpga_common.h

Signed-off-by: Alexander Dahl <ada at thorsis.com>
---
 README                                  | 4 ----
 configs/astro_mcf5373l_defconfig        | 1 +
 configs/mx53cx9020_defconfig            | 1 +
 configs/socfpga_arria10_defconfig       | 1 +
 configs/socfpga_arria5_defconfig        | 1 +
 configs/socfpga_cyclone5_defconfig      | 1 +
 configs/socfpga_dbm_soc1_defconfig      | 1 +
 configs/socfpga_de0_nano_soc_defconfig  | 1 +
 configs/socfpga_de10_nano_defconfig     | 1 +
 configs/socfpga_de10_standard_defconfig | 1 +
 configs/socfpga_de1_soc_defconfig       | 1 +
 configs/socfpga_is1_defconfig           | 1 +
 configs/socfpga_mcvevk_defconfig        | 1 +
 configs/socfpga_sockit_defconfig        | 1 +
 configs/socfpga_socrates_defconfig      | 1 +
 configs/socfpga_sr1500_defconfig        | 1 +
 configs/socfpga_vining_fpga_defconfig   | 1 +
 drivers/fpga/Kconfig                    | 6 ++++++
 include/configs/astro_mcf5373l.h        | 1 -
 include/configs/mx53cx9020.h            | 2 --
 include/configs/socfpga_common.h        | 7 -------
 scripts/config_whitelist.txt            | 1 -
 22 files changed, 22 insertions(+), 15 deletions(-)

diff --git a/README b/README
index 63c8bd5019..b2d2d9dc3c 100644
--- a/README
+++ b/README
@@ -1398,10 +1398,6 @@ The following options need to be configured:
 		Enables support for FPGA family.
 		(SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
 
-		CONFIG_FPGA_COUNT
-
-		Specify the number of FPGA devices to support.
-
 		CONFIG_SYS_FPGA_CHECK_BUSY
 
 		Enable checks on FPGA configuration interface busy
diff --git a/configs/astro_mcf5373l_defconfig b/configs/astro_mcf5373l_defconfig
index fcdc51df91..3ea4304ba7 100644
--- a/configs/astro_mcf5373l_defconfig
+++ b/configs/astro_mcf5373l_defconfig
@@ -32,6 +32,7 @@ CONFIG_FPGA_CYCLON2=y
 CONFIG_FPGA_XILINX=y
 CONFIG_FPGA_SPARTAN3=y
 CONFIG_SYS_FPGA_PROG_FEEDBACK=y
+CONFIG_FPGA_COUNT=1
 CONFIG_SYS_I2C_LEGACY=y
 CONFIG_SYS_I2C_FSL=y
 CONFIG_SYS_FSL_I2C_OFFSET=0x58000
diff --git a/configs/mx53cx9020_defconfig b/configs/mx53cx9020_defconfig
index f79595db68..11f2e3206b 100644
--- a/configs/mx53cx9020_defconfig
+++ b/configs/mx53cx9020_defconfig
@@ -23,6 +23,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_ARP_TIMEOUT=200
 CONFIG_FPGA_ALTERA=y
 CONFIG_FPGA_CYCLON2=y
+CONFIG_FPGA_COUNT=1
 CONFIG_FSL_ESDHC_IMX=y
 CONFIG_MTD=y
 CONFIG_PHYLIB=y
diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig
index 1be9a2df08..64dc562a0a 100644
--- a/configs/socfpga_arria10_defconfig
+++ b/configs/socfpga_arria10_defconfig
@@ -40,6 +40,7 @@ CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_FS_LOADER=y
 CONFIG_SPL_FS_LOADER=y
diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig
index dafeafff3e..106a403cc9 100644
--- a/configs/socfpga_arria5_defconfig
+++ b/configs/socfpga_arria5_defconfig
@@ -43,6 +43,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig
index b09672d8a2..1211354d0b 100644
--- a/configs/socfpga_cyclone5_defconfig
+++ b/configs/socfpga_cyclone5_defconfig
@@ -43,6 +43,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig
index a8ef2e934a..ca22c77790 100644
--- a/configs/socfpga_dbm_soc1_defconfig
+++ b/configs/socfpga_dbm_soc1_defconfig
@@ -52,6 +52,7 @@ CONFIG_BOOTFILE="fitImage"
 CONFIG_VERSION_VARIABLE=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig
index 2e5bd80d2e..dbf758097a 100644
--- a/configs/socfpga_de0_nano_soc_defconfig
+++ b/configs/socfpga_de0_nano_soc_defconfig
@@ -43,6 +43,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig
index 95b4ef638e..ef78cb9169 100644
--- a/configs/socfpga_de10_nano_defconfig
+++ b/configs/socfpga_de10_nano_defconfig
@@ -40,6 +40,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig
index 91bd49840d..c73e307fe3 100644
--- a/configs/socfpga_de10_standard_defconfig
+++ b/configs/socfpga_de10_standard_defconfig
@@ -40,6 +40,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig
index 75e16be42a..bacbe60a91 100644
--- a/configs/socfpga_de1_soc_defconfig
+++ b/configs/socfpga_de1_soc_defconfig
@@ -37,6 +37,7 @@ CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_VERSION_VARIABLE=y
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig
index 53e9a7296c..c2c15bd97b 100644
--- a/configs/socfpga_is1_defconfig
+++ b/configs/socfpga_is1_defconfig
@@ -45,6 +45,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_ARP_TIMEOUT=500
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig
index 07ca4bf954..9ab548e6ff 100644
--- a/configs/socfpga_mcvevk_defconfig
+++ b/configs/socfpga_mcvevk_defconfig
@@ -43,6 +43,7 @@ CONFIG_BOOTFILE="fitImage"
 CONFIG_VERSION_VARIABLE=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig
index e245288b92..fc50adcf81 100644
--- a/configs/socfpga_sockit_defconfig
+++ b/configs/socfpga_sockit_defconfig
@@ -43,6 +43,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig
index 7044186469..c16cb59ee4 100644
--- a/configs/socfpga_socrates_defconfig
+++ b/configs/socfpga_socrates_defconfig
@@ -43,6 +43,7 @@ CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_DFU_MMC=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig
index b0be033953..3d6d264bd5 100644
--- a/configs/socfpga_sr1500_defconfig
+++ b/configs/socfpga_sr1500_defconfig
@@ -49,6 +49,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_VERSION_VARIABLE=y
 CONFIG_SPL_DM_SEQ_ALIAS=y
 CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig
index 331975ad30..dac0f044eb 100644
--- a/configs/socfpga_vining_fpga_defconfig
+++ b/configs/socfpga_vining_fpga_defconfig
@@ -62,6 +62,7 @@ CONFIG_DFU_MMC=y
 CONFIG_DFU_RAM=y
 CONFIG_DFU_SF=y
 CONFIG_SYS_DFU_DATA_BUF_SIZE=0x1000000
+CONFIG_FPGA_COUNT=1
 CONFIG_DWAPB_GPIO=y
 CONFIG_DM_I2C=y
 CONFIG_SYS_I2C_DW=y
diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index e2e8c13b22..d89392d9a4 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -95,4 +95,10 @@ config SYS_FPGA_PROG_FEEDBACK
 	help
 	  Enable printing of hash marks during FPGA configuration.
 
+config FPGA_COUNT
+	int "Number of FPGA devices to support"
+	depends on FPGA
+	help
+	  Specify the number of FPGA devices to support.
+
 endmenu
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 4cae942c55..e8065e4a36 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -133,7 +133,6 @@
  * it needs non-blocking CFI routines.
  */
 
-#define CONFIG_FPGA_COUNT	1
 #define CONFIG_SYS_FPGA_WAIT		1000
 
 /* End of user parameters to be customized */
diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h
index fafc5f1adc..3993a35a09 100644
--- a/include/configs/mx53cx9020.h
+++ b/include/configs/mx53cx9020.h
@@ -16,8 +16,6 @@
 
 #define CONFIG_MXC_UART_BASE UART2_BASE
 
-#define CONFIG_FPGA_COUNT 1
-
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 #define CONFIG_SYS_FSL_ESDHC_NUM	2
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 5ecd1e6399..4b8d733cf7 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -78,13 +78,6 @@
 #define CONFIG_DW_ALTDESCRIPTOR
 #endif
 
-/*
- * FPGA Driver
- */
-#ifdef CONFIG_CMD_FPGA
-#define CONFIG_FPGA_COUNT		1
-#endif
-
 /*
  * L4 OSC1 Timer 0
  */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index d7c412efae..37963c2923 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -96,7 +96,6 @@ CONFIG_FLASH_SHOW_PROGRESS
 CONFIG_FLASH_SPANSION_S29WS_N
 CONFIG_FLASH_VERIFY
 CONFIG_FM_PLAT_CLK_DIV
-CONFIG_FPGA_COUNT
 CONFIG_FPGA_STRATIX_V
 CONFIG_FSL_CADMUS
 CONFIG_FSL_CORENET
-- 
2.30.2

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