[PATCH] mmc: zynq_sdhci: Fix timing macros for MMC High speed

Michal Simek michal.simek at amd.com
Wed Jun 29 13:43:07 CEST 2022



On 6/27/22 10:52, Ashok Reddy Soma wrote:
> Timing macro's are wrong for MMC_HS_52 and MMC_DDR_52. Fix it with
> correct values of MMC_TIMING_MMC_HS and MMC_TIMING_MMC_DDR52 respectively.
> 
> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at xilinx.com>
> ---
> 
>   drivers/mmc/zynq_sdhci.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/mmc/zynq_sdhci.c b/drivers/mmc/zynq_sdhci.c
> index e978b67988..8f4071c8c2 100644
> --- a/drivers/mmc/zynq_sdhci.c
> +++ b/drivers/mmc/zynq_sdhci.c
> @@ -101,8 +101,8 @@ static const u8 mode2timing[] = {
>   	[MMC_LEGACY] = MMC_TIMING_LEGACY,
>   	[MMC_HS] = MMC_TIMING_MMC_HS,
>   	[SD_HS] = MMC_TIMING_SD_HS,
> -	[MMC_HS_52] = MMC_TIMING_UHS_SDR50,
> -	[MMC_DDR_52] = MMC_TIMING_UHS_DDR50,
> +	[MMC_HS_52] = MMC_TIMING_MMC_HS,
> +	[MMC_DDR_52] = MMC_TIMING_MMC_DDR52,
>   	[UHS_SDR12] = MMC_TIMING_UHS_SDR12,
>   	[UHS_SDR25] = MMC_TIMING_UHS_SDR25,
>   	[UHS_SDR50] = MMC_TIMING_UHS_SDR50,

Applied.
M


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