[PATCH] sunxi-nand: fix the PIO instead of DMA implementation
Maxime Ripard
maxime at cerno.tech
Thu Jun 30 09:31:43 CEST 2022
On Thu, Jun 30, 2022 at 09:13:22AM +0200, Miquel Raynal wrote:
> Hi Markus,
>
> + Maxime, for the record :)
>
> mhoffrogge at gmail.com wrote on Thu, 30 Jun 2022 01:26:39 +0200:
>
> > The sunxi nand SPL loader was broken at least for SUN4I,
> > SUN5I and SUN7I SOCs since the implementation change
> > from DMA to PIO usage - commit 6ddbb1e.
> >
> > Root cause for this issue is the NFC control flag NFC_CTL_RAM_METHOD
> > being set by method nand_apply_config.
> >
> > This flag controls the bus being used for the NFCs internal RAM access.
> > It must be set for the DMA use case only.
> > See A33_Nand_Flash_Controller_Specification.pdf page 12.
> >
> > This fix is tested by myself on a Cubietruck A20 board.
> > Others should test it on new generation SOCs as well.
>
> Good to know that someone tackled this, Maxime already reported some
> time ago that it was broken for a number of boards but I never took the
> time to investigate, apologies.
Oh, that's awesome, thanks for tackling this :)
Maxime
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