[PATCH v1 2/6] clk: microchip: mpfs: convert parent rate acquistion to get_get_rate()
Leo Liang
ycliang at andestech.com
Wed Nov 2 12:20:26 CET 2022
On Tue, Oct 25, 2022 at 08:58:45AM +0100, Conor Dooley wrote:
> Currently the clock driver for PolarFire SoC takes a very naive approach
> to the relationship between clocks. It reads the dt to get an input
> clock, assumes that that is fixed frequency, reads the "clock-frequency"
> property & uses that to set up both the "cfg" and "periph" clocks.
>
> Simplifying for the sake of incremental fixes, the "correct" parentage for
> the clocks currently supported in U-Boot is that the "cfg" clocks should
> be children of the fixed frequency clock in the dt. The AHB clock is one
> of these "cfg" clocks and is the parent of the "periph" clocks.
>
> Instead of passing the clock rate of the fixed-frequency clock to the
> "cfg" and "periph" registration functions and the name of the parents,
> pass their actual parents & use clk_get_rate() to determine their parents
> rates.
>
> The "periph" clocks are purely gate clocks and should not be reading the
> AHB clocks registers to determine their rates, as they can simply report
> the output of clk_get_rate() on their parent.
>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
> ---
> drivers/clk/microchip/Makefile | 2 +-
> drivers/clk/microchip/mpfs_clk.c | 18 ++++++++----------
> drivers/clk/microchip/mpfs_clk.h | 12 ++++--------
> drivers/clk/microchip/mpfs_clk_cfg.c | 7 +++----
> drivers/clk/microchip/mpfs_clk_periph.c | 16 ++++------------
> 5 files changed, 20 insertions(+), 35 deletions(-)
Reviewed-by: Leo Yu-Chi Liang <ycliang at andestech.com>
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