[PATCH v2 2/2] ipq40xx/snapdragon: Merge the two, more than 90% overlapping Qualcomm's Snapdrgon based arches, into one: "mach-snapdragon".

Andrey VOLKOV andrey at volkov.fr
Sat Nov 12 22:46:06 CET 2022


Hi Marco, Tom,

SYS_LOAD_ADDR has been fixed in the following patches. Could you check/validate?

--
Regards
Andrey VOLKOV

Le 08/11/2022 à 16:26, Robert Marko a écrit :
> On Sun, Nov 6, 2022 at 2:53 AM Andrey VOLKOV <andrey at volkov.fr> wrote:
>>
>> Signed-off-by: Andrey VOLKOV <andrey at volkov.fr>
>> ---
>>  arch/arm/Kconfig                              |  19 +-
>>  arch/arm/Makefile                             |   1 -
>>  arch/arm/mach-ipq40xx/Kconfig                 |  15 --
>>  arch/arm/mach-ipq40xx/Makefile                |   9 -
>>  arch/arm/mach-ipq40xx/include/mach/gpio.h     |  10 --
>>  arch/arm/mach-ipq40xx/pinctrl-snapdragon.c    | 166 ------------------
>>  arch/arm/mach-ipq40xx/pinctrl-snapdragon.h    |  30 ----
>>  arch/arm/mach-snapdragon/Kconfig              |  47 ++++-
>>  arch/arm/mach-snapdragon/Makefile             |   5 +-
>>  .../clock-ipq4019.c                           |   0
>>  .../pinctrl-ipq4019.c                         |   0
>>  arch/arm/mach-snapdragon/pinctrl-snapdragon.c |  38 ++--
>>  arch/arm/mach-snapdragon/pinctrl-snapdragon.h |   1 +
>>  drivers/phy/qcom/Kconfig                      |   2 +-
>>  drivers/reset/Kconfig                         |   2 +-
>>  drivers/reset/reset-qcom.c                    |   2 +-
>>  drivers/smem/Kconfig                          |   2 +-
>>  drivers/spi/Kconfig                           |   2 +-
>>  18 files changed, 80 insertions(+), 271 deletions(-)
>>  delete mode 100644 arch/arm/mach-ipq40xx/Kconfig
>>  delete mode 100644 arch/arm/mach-ipq40xx/Makefile
>>  delete mode 100644 arch/arm/mach-ipq40xx/include/mach/gpio.h
>>  delete mode 100644 arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
>>  delete mode 100644 arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
>>  rename arch/arm/{mach-ipq40xx => mach-snapdragon}/clock-ipq4019.c (100%)
>>  rename arch/arm/{mach-ipq40xx => mach-snapdragon}/pinctrl-ipq4019.c (100%)
>>
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index cdc8d4aeb4..d94ca7dcf9 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -781,21 +781,6 @@ config ARCH_INTEGRATOR
>>         select PL01X_SERIAL
>>         imply CMD_DM
>>
>> -config ARCH_IPQ40XX
>> -       bool "Qualcomm IPQ40xx SoCs"
>> -       select CPU_V7A
>> -       select DM
>> -       select DM_GPIO
>> -       select DM_SERIAL
>> -       select DM_RESET
>> -       select GPIO_EXTRA_HEADER
>> -       select MSM_SMEM
>> -       select PINCTRL
>> -       select CLK
>> -       select SMEM
>> -       select OF_CONTROL
>> -       imply CMD_DM
>> -
>>  config ARCH_KEYSTONE
>>         bool "TI Keystone"
>>         select CMD_POWEROFF
>> @@ -1076,6 +1061,7 @@ config ARCH_RMOBILE
>>
>>  config ARCH_SNAPDRAGON
>>         bool "Qualcomm Snapdragon SoCs"
>> +       select CLK
>>         select DM
>>         select DM_GPIO
>>         select DM_SERIAL
>> @@ -1083,6 +1069,7 @@ config ARCH_SNAPDRAGON
>>         select MSM_SMEM
>>         select OF_CONTROL
>>         select OF_SEPARATE
>> +       select PINCTRL
>>         select SMEM
>>         select SPMI
>>         imply CMD_DM
>> @@ -2203,8 +2190,6 @@ source "arch/arm/mach-highbank/Kconfig"
>>
>>  source "arch/arm/mach-integrator/Kconfig"
>>
>> -source "arch/arm/mach-ipq40xx/Kconfig"
>> -
>>  source "arch/arm/mach-k3/Kconfig"
>>
>>  source "arch/arm/mach-keystone/Kconfig"
>> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
>> index ac602aed9c..ceee6a02d0 100644
>> --- a/arch/arm/Makefile
>> +++ b/arch/arm/Makefile
>> @@ -61,7 +61,6 @@ machine-$(CONFIG_ARCH_DAVINCI)                += davinci
>>  machine-$(CONFIG_ARCH_EXYNOS)          += exynos
>>  machine-$(CONFIG_ARCH_GXP)             += hpe
>>  machine-$(CONFIG_ARCH_HIGHBANK)                += highbank
>> -machine-$(CONFIG_ARCH_IPQ40XX)         += ipq40xx
>>  machine-$(CONFIG_ARCH_K3)              += k3
>>  machine-$(CONFIG_ARCH_KEYSTONE)                += keystone
>>  machine-$(CONFIG_ARCH_KIRKWOOD)                += kirkwood
>> diff --git a/arch/arm/mach-ipq40xx/Kconfig b/arch/arm/mach-ipq40xx/Kconfig
>> deleted file mode 100644
>> index f9db55c42a..0000000000
>> --- a/arch/arm/mach-ipq40xx/Kconfig
>> +++ /dev/null
>> @@ -1,15 +0,0 @@
>> -if ARCH_IPQ40XX
>> -
>> -config SYS_SOC
>> -       default "ipq40xx"
>> -
>> -config SYS_MALLOC_F_LEN
>> -       default 0x2000
>> -
>> -config TEXT_BASE
>> -       default 0x87300000
>> -
>> -config NR_DRAM_BANKS
>> -       default 1
>> -
>> -endif
>> diff --git a/arch/arm/mach-ipq40xx/Makefile b/arch/arm/mach-ipq40xx/Makefile
>> deleted file mode 100644
>> index 08a65b8854..0000000000
>> --- a/arch/arm/mach-ipq40xx/Makefile
>> +++ /dev/null
>> @@ -1,9 +0,0 @@
>> -# SPDX-License-Identifier: GPL-2.0+
>> -#
>> -# Copyright (c) 2019 Sartura Ltd.
>> -#
>> -# Author: Robert Marko <robert.marko at sartura.hr>
>> -
>> -obj-y += clock-ipq4019.o
>> -obj-y += pinctrl-snapdragon.o
>> -obj-y += pinctrl-ipq4019.o
>> diff --git a/arch/arm/mach-ipq40xx/include/mach/gpio.h b/arch/arm/mach-ipq40xx/include/mach/gpio.h
>> deleted file mode 100644
>> index a45747c0fe..0000000000
>> --- a/arch/arm/mach-ipq40xx/include/mach/gpio.h
>> +++ /dev/null
>> @@ -1,10 +0,0 @@
>> -/* SPDX-License-Identifier: GPL-2.0+ */
>> -/*
>> - * Empty gpio.h
>> - *
>> - * This file must stay as arch/arm/include/asm/gpio.h requires it.
>> - *
>> - * Copyright (c) 2019 Sartura Ltd.
>> - *
>> - * Author: Robert Marko <robert.marko at sartura.hr>
>> - */
>> diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
>> deleted file mode 100644
>> index 036fec93d7..0000000000
>> --- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.c
>> +++ /dev/null
>> @@ -1,166 +0,0 @@
>> -// SPDX-License-Identifier: GPL-2.0+
>> -/*
>> - * TLMM driver for Qualcomm IPQ40xx
>> - *
>> - * (C) Copyright 2018 Ramon Fried <ramon.fried at gmail.com>
>> - *
>> - * Copyright (c) 2020 Sartura Ltd.
>> - *
>> - * Author: Robert Marko <robert.marko at sartura.hr>
>> - *
>> - */
>> -
>> -#include <common.h>
>> -#include <dm.h>
>> -#include <errno.h>
>> -#include <asm/io.h>
>> -#include <dm/device_compat.h>
>> -#include <dm/lists.h>
>> -#include <dm/pinctrl.h>
>> -#include <linux/bitops.h>
>> -#include "pinctrl-snapdragon.h"
>> -
>> -struct msm_pinctrl_priv {
>> -       phys_addr_t base;
>> -       struct msm_pinctrl_data *data;
>> -};
>> -
>> -#define GPIO_CONFIG_OFFSET(x)         ((x) * 0x1000)
>> -#define TLMM_GPIO_PULL_MASK GENMASK(1, 0)
>> -#define TLMM_FUNC_SEL_MASK GENMASK(5, 2)
>> -#define TLMM_DRV_STRENGTH_MASK GENMASK(8, 6)
>> -#define TLMM_GPIO_DISABLE BIT(9)
>> -
>> -static const struct pinconf_param msm_conf_params[] = {
>> -       { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 2 },
>> -       { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
>> -       { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 2 },
>> -};
>> -
>> -static int msm_get_functions_count(struct udevice *dev)
>> -{
>> -       struct msm_pinctrl_priv *priv = dev_get_priv(dev);
>> -
>> -       return priv->data->functions_count;
>> -}
>> -
>> -static int msm_get_pins_count(struct udevice *dev)
>> -{
>> -       struct msm_pinctrl_priv *priv = dev_get_priv(dev);
>> -
>> -       return priv->data->pin_count;
>> -}
>> -
>> -static const char *msm_get_function_name(struct udevice *dev,
>> -                                        unsigned int selector)
>> -{
>> -       struct msm_pinctrl_priv *priv = dev_get_priv(dev);
>> -
>> -       return priv->data->get_function_name(dev, selector);
>> -}
>> -
>> -static int msm_pinctrl_probe(struct udevice *dev)
>> -{
>> -       struct msm_pinctrl_priv *priv = dev_get_priv(dev);
>> -
>> -       priv->base = devfdt_get_addr(dev);
>> -       priv->data = (struct msm_pinctrl_data *)dev->driver_data;
>> -
>> -       return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
>> -}
>> -
>> -static const char *msm_get_pin_name(struct udevice *dev, unsigned int selector)
>> -{
>> -       struct msm_pinctrl_priv *priv = dev_get_priv(dev);
>> -
>> -       return priv->data->get_pin_name(dev, selector);
>> -}
>> -
>> -static int msm_pinmux_set(struct udevice *dev, unsigned int pin_selector,
>> -                         unsigned int func_selector)
>> -{
>> -       struct msm_pinctrl_priv *priv = dev_get_priv(dev);
>> -
>> -       clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
>> -                       TLMM_FUNC_SEL_MASK | TLMM_GPIO_DISABLE,
>> -                       priv->data->get_function_mux(func_selector) << 2);
>> -       return 0;
>> -}
>> -
>> -static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector,
>> -                          unsigned int param, unsigned int argument)
>> -{
>> -       struct msm_pinctrl_priv *priv = dev_get_priv(dev);
>> -
>> -       switch (param) {
>> -       case PIN_CONFIG_DRIVE_STRENGTH:
>> -               clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
>> -                               TLMM_DRV_STRENGTH_MASK, argument << 6);
>> -               break;
>> -       case PIN_CONFIG_BIAS_DISABLE:
>> -               clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
>> -                            TLMM_GPIO_PULL_MASK);
>> -               break;
>> -       case PIN_CONFIG_BIAS_PULL_UP:
>> -               clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
>> -                            TLMM_GPIO_PULL_MASK, argument);
>> -               break;
>> -       default:
>> -               return 0;
>> -       }
>> -
>> -       return 0;
>> -}
>> -
>> -static int msm_pinctrl_bind(struct udevice *dev)
>> -{
>> -       ofnode node = dev_ofnode(dev);
>> -       const char *name;
>> -       int ret;
>> -
>> -       ofnode_get_property(node, "gpio-controller", &ret);
>> -       if (ret < 0)
>> -               return 0;
>> -
>> -       /* Get the name of gpio node */
>> -       name = ofnode_get_name(node);
>> -       if (!name)
>> -               return -EINVAL;
>> -
>> -       /* Bind gpio node */
>> -       ret = device_bind_driver_to_node(dev, "gpio_msm",
>> -                                        name, node, NULL);
>> -       if (ret)
>> -               return ret;
>> -
>> -       dev_dbg(dev, "bind %s\n", name);
>> -
>> -       return 0;
>> -}
>> -
>> -static struct pinctrl_ops msm_pinctrl_ops = {
>> -       .get_pins_count = msm_get_pins_count,
>> -       .get_pin_name = msm_get_pin_name,
>> -       .set_state = pinctrl_generic_set_state,
>> -       .pinmux_set = msm_pinmux_set,
>> -       .pinconf_num_params = ARRAY_SIZE(msm_conf_params),
>> -       .pinconf_params = msm_conf_params,
>> -       .pinconf_set = msm_pinconf_set,
>> -       .get_functions_count = msm_get_functions_count,
>> -       .get_function_name = msm_get_function_name,
>> -};
>> -
>> -static const struct udevice_id msm_pinctrl_ids[] = {
>> -       { .compatible = "qcom,ipq4019-pinctrl", .data = (ulong)&ipq4019_data },
>> -       { }
>> -};
>> -
>> -U_BOOT_DRIVER(pinctrl_snapdraon) = {
>> -       .name           = "pinctrl_msm",
>> -       .id             = UCLASS_PINCTRL,
>> -       .of_match       = msm_pinctrl_ids,
>> -       .priv_auto      = sizeof(struct msm_pinctrl_priv),
>> -       .ops            = &msm_pinctrl_ops,
>> -       .probe          = msm_pinctrl_probe,
>> -       .bind           = msm_pinctrl_bind,
>> -};
>> diff --git a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h b/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
>> deleted file mode 100644
>> index 2341a71349..0000000000
>> --- a/arch/arm/mach-ipq40xx/pinctrl-snapdragon.h
>> +++ /dev/null
>> @@ -1,30 +0,0 @@
>> -/* SPDX-License-Identifier: GPL-2.0+ */
>> -/*
>> - * Qualcomm Pin control
>> - *
>> - * (C) Copyright 2018 Ramon Fried <ramon.fried at gmail.com>
>> - *
>> - */
>> -#ifndef _PINCTRL_SNAPDRAGON_H
>> -#define _PINCTRL_SNAPDRAGON_H
>> -
>> -#include <common.h>
>> -
>> -struct msm_pinctrl_data {
>> -       int pin_count;
>> -       int functions_count;
>> -       const char *(*get_function_name)(struct udevice *dev,
>> -                                        unsigned int selector);
>> -       unsigned int (*get_function_mux)(unsigned int selector);
>> -       const char *(*get_pin_name)(struct udevice *dev,
>> -                                   unsigned int selector);
>> -};
>> -
>> -struct pinctrl_function {
>> -       const char *name;
>> -       int val;
>> -};
>> -
>> -extern struct msm_pinctrl_data ipq4019_data;
>> -
>> -#endif
>> diff --git a/arch/arm/mach-snapdragon/Kconfig b/arch/arm/mach-snapdragon/Kconfig
>> index 83dd2c07a1..6600120248 100644
>> --- a/arch/arm/mach-snapdragon/Kconfig
>> +++ b/arch/arm/mach-snapdragon/Kconfig
>> @@ -9,28 +9,61 @@ config SYS_MALLOC_F_LEN
>>  config SPL_SYS_MALLOC_F_LEN
>>         default 0x2000
>>
>> -config APQ8016
>> +config COMMON_SNAPDRAGON
>> +       bool
>> +       default n
>> +
>> +config SNAPDRAGON_ARMV8
>>         bool
>>         select ARM64
>> +       select COMMON_SNAPDRAGON
>> +       default n
>> +
>> +config SNAPDRAGON_ARMV7A
>> +       bool
>> +       select CPU_V7A
>> +       default n
>> +
>> +config APQ8016
>> +       bool
>> +       select SNAPDRAGON_ARMV8
>>         default n
>>
>>  config APQ8096
>>         bool
>> -       select ARM64
>> +       select SNAPDRAGON_ARMV8
>>         default n
>>
>>  config SDM845
>>         bool
>> -       select ARM64
>> +       select SNAPDRAGON_ARMV8
>>         select LINUX_KERNEL_IMAGE_HEADER
>>         default n
>>
>>  config QCS40X
>>         bool
>> -       select ARM64
>> +       select SNAPDRAGON_ARMV8
>>         select LINUX_KERNEL_IMAGE_HEADER
>>         default n
>>
>> +config IPQ40XX
>> +       bool
>> +       select SNAPDRAGON_ARMV7A
>> +       select DM_RESET
>> +       default n
>> +
>> +config SYS_LOAD_ADDR
>> +       default 0x80000000 if (IPQ40XX || SDM845 || QCS40X)
>
> This is not correct for IPQ40xx, it uses 0x84000000 as the default load address.
>
> Regards,
> Robert
>
>
>> +       default 0x80080000 if (APQ8096 || APQ8016)
>> +
>> +config SYS_TEXT_BASE
>> +       default 0x8f600000 if APQ8016
>> +       default 0x87300000 if IPQ40XX
>> +
>> +config NR_DRAM_BANKS
>> +       default 1 if (IPQ40XX || APQ8016)
>> +       default 2 if APQ8096
>> +
>>  config LNX_KRNL_IMG_TEXT_OFFSET_BASE
>>         default 0x80000000
>>
>> @@ -98,6 +131,12 @@ config TARGET_QCS404EVB
>>           - 1GiB RAM
>>           - 8GiB eMMC, uSD slot
>>
>> +config TARGET_IPQ4019
>> +       bool "Generic IPQ4019 based board"
>> +       select IPQ40XX
>> +       help
>> +         Support for the generic Qualcomm IPQ4019 based board
>> +
>>  endchoice
>>
>>  source "board/qualcomm/dragonboard410c/Kconfig"
>> diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile
>> index 00997196ab..89e5a49780 100644
>> --- a/arch/arm/mach-snapdragon/Makefile
>> +++ b/arch/arm/mach-snapdragon/Makefile
>> @@ -2,7 +2,7 @@
>>  #
>>  # (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski at gmail.com>
>>
>> -obj-y += clock-snapdragon.o
>> +obj-$(CONFIG_COMMON_SNAPDRAGON) += clock-snapdragon.o
>>  obj-y += pinctrl-snapdragon.o
>>
>>  obj-$(CONFIG_SDM845) += clock-sdm845.o
>> @@ -22,3 +22,6 @@ obj-$(CONFIG_APQ8016) += misc.o dram.o
>>  obj-$(CONFIG_QCS40X) += clock-qcs404.o
>>  obj-$(CONFIG_QCS40X) += sysmap-qcs404.o
>>  obj-$(CONFIG_QCS40X) += pinctrl-qcs404.o
>> +
>> +obj-$(CONFIG_IPQ40XX) += clock-ipq4019.o
>> +obj-$(CONFIG_IPQ40XX) += pinctrl-ipq4019.o
>> diff --git a/arch/arm/mach-ipq40xx/clock-ipq4019.c b/arch/arm/mach-snapdragon/clock-ipq4019.c
>> similarity index 100%
>> rename from arch/arm/mach-ipq40xx/clock-ipq4019.c
>> rename to arch/arm/mach-snapdragon/clock-ipq4019.c
>> diff --git a/arch/arm/mach-ipq40xx/pinctrl-ipq4019.c b/arch/arm/mach-snapdragon/pinctrl-ipq4019.c
>> similarity index 100%
>> rename from arch/arm/mach-ipq40xx/pinctrl-ipq4019.c
>> rename to arch/arm/mach-snapdragon/pinctrl-ipq4019.c
>> diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
>> index 0740993b61..8d7cb1944f 100644
>> --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
>> +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
>> @@ -1,9 +1,13 @@
>>  // SPDX-License-Identifier: GPL-2.0+
>>  /*
>> - * TLMM driver for Qualcomm APQ8016, APQ8096
>> + * TLMM driver for Qualcomm Snapdragon SOCs
>>   *
>>   * (C) Copyright 2018 Ramon Fried <ramon.fried at gmail.com>
>>   *
>> + * Copyright (c) 2020 Sartura Ltd.
>> + *
>> + * Author: Robert Marko <robert.marko at sartura.hr>
>> + *
>>   */
>>
>>  #include <common.h>
>> @@ -30,6 +34,7 @@ struct msm_pinctrl_priv {
>>  static const struct pinconf_param msm_conf_params[] = {
>>         { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 3 },
>>         { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
>> +       { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 2 },
>>  };
>>
>>  static int msm_get_functions_count(struct udevice *dev)
>> @@ -96,6 +101,10 @@ static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector,
>>                 clrbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
>>                              TLMM_GPIO_PULL_MASK);
>>                 break;
>> +       case PIN_CONFIG_BIAS_PULL_UP:
>> +               clrsetbits_le32(priv->base + GPIO_CONFIG_OFFSET(pin_selector),
>> +                            TLMM_GPIO_PULL_MASK, argument);
>> +               break;
>>         default:
>>                 return 0;
>>         }
>> @@ -103,18 +112,6 @@ static int msm_pinconf_set(struct udevice *dev, unsigned int pin_selector,
>>         return 0;
>>  }
>>
>> -static struct pinctrl_ops msm_pinctrl_ops = {
>> -       .get_pins_count = msm_get_pins_count,
>> -       .get_pin_name = msm_get_pin_name,
>> -       .set_state = pinctrl_generic_set_state,
>> -       .pinmux_set = msm_pinmux_set,
>> -       .pinconf_num_params = ARRAY_SIZE(msm_conf_params),
>> -       .pinconf_params = msm_conf_params,
>> -       .pinconf_set = msm_pinconf_set,
>> -       .get_functions_count = msm_get_functions_count,
>> -       .get_function_name = msm_get_function_name,
>> -};
>> -
>>  static int msm_pinctrl_bind(struct udevice *dev)
>>  {
>>         ofnode node = dev_ofnode(dev);
>> @@ -141,6 +138,18 @@ static int msm_pinctrl_bind(struct udevice *dev)
>>         return 0;
>>  }
>>
>> +static struct pinctrl_ops msm_pinctrl_ops = {
>> +       .get_pins_count = msm_get_pins_count,
>> +       .get_pin_name = msm_get_pin_name,
>> +       .set_state = pinctrl_generic_set_state,
>> +       .pinmux_set = msm_pinmux_set,
>> +       .pinconf_num_params = ARRAY_SIZE(msm_conf_params),
>> +       .pinconf_params = msm_conf_params,
>> +       .pinconf_set = msm_pinconf_set,
>> +       .get_functions_count = msm_get_functions_count,
>> +       .get_function_name = msm_get_function_name,
>> +};
>> +
>>  static const struct udevice_id msm_pinctrl_ids[] = {
>>  #ifdef CONFIG_APQ8016
>>         { .compatible = "qcom,msm8916-pinctrl", .data = (ulong)&apq8016_data },
>> @@ -153,6 +162,9 @@ static const struct udevice_id msm_pinctrl_ids[] = {
>>  #endif
>>  #ifdef CONFIG_QCS40X
>>         { .compatible = "qcom,qcs404-pinctrl", .data = (ulong)&qcs404_data },
>> +#endif
>> +#ifdef CONFIG_IPQ40XX
>> +       { .compatible = "qcom,ipq4019-pinctrl", .data = (ulong)&ipq4019_data },
>>  #endif
>>         { }
>>  };
>> diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
>> index 178ee01a41..2ba61a45b3 100644
>> --- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
>> +++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
>> @@ -29,5 +29,6 @@ extern struct msm_pinctrl_data apq8016_data;
>>  extern struct msm_pinctrl_data apq8096_data;
>>  extern struct msm_pinctrl_data sdm845_data;
>>  extern struct msm_pinctrl_data qcs404_data;
>> +extern struct msm_pinctrl_data ipq4019_data;
>>
>>  #endif
>> diff --git a/drivers/phy/qcom/Kconfig b/drivers/phy/qcom/Kconfig
>> index f4ca174805..cdc73d46b4 100644
>> --- a/drivers/phy/qcom/Kconfig
>> +++ b/drivers/phy/qcom/Kconfig
>> @@ -8,7 +8,7 @@ config MSM8916_USB_PHY
>>
>>  config PHY_QCOM_IPQ4019_USB
>>         tristate "Qualcomm IPQ4019 USB PHY driver"
>> -       depends on PHY && ARCH_IPQ40XX
>> +       depends on PHY && IPQ40XX
>>         help
>>           Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
>>
>> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
>> index 4cb0ba0850..a3d5fe8872 100644
>> --- a/drivers/reset/Kconfig
>> +++ b/drivers/reset/Kconfig
>> @@ -158,7 +158,7 @@ config RESET_IMX7
>>
>>  config RESET_QCOM
>>         bool "Reset driver for Qualcomm SoCs"
>> -       depends on DM_RESET && (ARCH_SNAPDRAGON || ARCH_IPQ40XX)
>> +       depends on DM_RESET && ARCH_SNAPDRAGON
>>         default y
>>         help
>>           Support for reset controller on Qualcomm SoCs.
>> diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
>> index 2c61d6a6dc..7e5eae190d 100644
>> --- a/drivers/reset/reset-qcom.c
>> +++ b/drivers/reset/reset-qcom.c
>> @@ -25,7 +25,7 @@ struct qcom_reset_map {
>>         u8 bit;
>>  };
>>
>> -#ifdef CONFIG_ARCH_IPQ40XX
>> +#ifdef CONFIG_IPQ40XX
>>  #include <dt-bindings/reset/qcom,ipq4019-reset.h>
>>  static const struct qcom_reset_map gcc_qcom_resets[] = {
>>         [WIFI0_CPU_INIT_RESET] = { 0x1f008, 5 },
>> diff --git a/drivers/smem/Kconfig b/drivers/smem/Kconfig
>> index 73d51b3a7a..7169d0f205 100644
>> --- a/drivers/smem/Kconfig
>> +++ b/drivers/smem/Kconfig
>> @@ -15,7 +15,7 @@ config SANDBOX_SMEM
>>  config MSM_SMEM
>>      bool "Qualcomm Shared Memory Manager (SMEM)"
>>      depends on DM
>> -    depends on ARCH_SNAPDRAGON || ARCH_IPQ40XX
>> +    depends on ARCH_SNAPDRAGON
>>      help
>>        Enable support for the Qualcomm Shared Memory Manager.
>>        The driver provides an interface to items in a heap shared among all
>> diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
>> index c6900f449d..d9f8a1c196 100644
>> --- a/drivers/spi/Kconfig
>> +++ b/drivers/spi/Kconfig
>> @@ -371,7 +371,7 @@ config PL022_SPI
>>
>>  config SPI_QUP
>>         bool "Qualcomm SPI controller with QUP interface"
>> -       depends on ARCH_IPQ40XX
>> +       depends on ARCH_SNAPDRAGON
>>         help
>>           Qualcomm Universal Peripheral (QUP) core is an AHB slave that
>>           provides a common data path (an output FIFO and an input FIFO)
>> --
>> 2.34.1
>>
>
>


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