[PATCH 2/5] arm: socfpga: soc64: Update reset manager registers

[Jit Loon Lim]

From: Ley Foon Tan <ley.foon.tan at intel.com>

HSD #1508586908-2: Add reset manager registers, preparation for f2s bridge reset support.

Signed-off-by: Ley Foon Tan <ley.foon.tan at intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim at intel.com>
---
 arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h b/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h
index ca5739c30c..9589b61749 100644
--- a/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h
@@ -29,7 +29,6 @@ void socfpga_bridges_reset(int enable);
 #define RSTMGR_BRGMODRST_F2SDRAM1_MASK	BIT(4)
 #define RSTMGR_BRGMODRST_F2SDRAM2_MASK	BIT(5)
 #define RSTMGR_BRGMODRST_DDRSCH_MASK	BIT(6)
-
 #define BRGMODRST_SOC2FPGA_BRIDGES	(RSTMGR_BRGMODRST_SOC2FPGA_MASK | \
 					 RSTMGR_BRGMODRST_LWSOC2FPGA_MASK)
 #define BRGMODRST_FPGA2SOC_BRIDGES	(RSTMGR_BRGMODRST_FPGA2SOC_MASK | \
-- 
2.26.2