[PATCH] rockchip: clk: add watchdog clock to px30_clk_enable

Kever Yang kever.yang at rock-chips.com
Tue Nov 15 02:41:21 CET 2022


On 2022/11/14 18:33, Quentin Schulz wrote:
> From: Quentin Schulz <quentin.schulz at theobroma-systems.com>
>
> Add the PCLK_WDT_NS clock to px30_clk_enable so that the watchdog driver
> can probe since it wants to enable this clock.
>
> Cc: Quentin Schulz <foss+uboot at 0leil.net>
> Signed-off-by: Quentin Schulz <quentin.schulz at theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang at rock-chips.com>

Thanks,
- Kever
> ---
> rockchip: clk: add watchdog clock to px30_clk_enable
>
> This is required for px30 to be able to probe the Designware watchdog device.
>
> To: Lukasz Majewski <lukma at denx.de>
> To: Sean Anderson <seanga2 at gmail.com>
> To: Simon Glass <sjg at chromium.org>
> To: Philipp Tomsich <philipp.tomsich at vrull.eu>
> To: Kever Yang <kever.yang at rock-chips.com>
> Cc: u-boot at lists.denx.de
> ---
>   drivers/clk/rockchip/clk_px30.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/drivers/clk/rockchip/clk_px30.c b/drivers/clk/rockchip/clk_px30.c
> index 5d467447a1..38cb90e512 100644
> --- a/drivers/clk/rockchip/clk_px30.c
> +++ b/drivers/clk/rockchip/clk_px30.c
> @@ -1415,6 +1415,9 @@ static int px30_clk_enable(struct clk *clk)
>   	case SCLK_GMAC_RMII:
>   		/* Required to successfully probe the Designware GMAC driver */
>   		return 0;
> +	case PCLK_WDT_NS:
> +		/* Required to successfully probe the Designware watchdog driver */
> +		return 0;
>   	}
>   
>   	debug("%s: unsupported clk %ld\n", __func__, clk->id);
>
> ---
> base-commit: 0cbeed4f6648e0e4966475e3544280a69ecb59d3
> change-id: 20221114-px30-wdt-clk-58c875b33d37
>
> Best regards,


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