[PoC 045/241] global: Migrate CONFIG_FSL_SERDES1 to CFG

[Tom Rini]

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 board/freescale/mpc837xerdb/mpc837xerdb.c | 4 ++--
 include/configs/MPC837XERDB.h             | 2 +-
 scripts/config_whitelist.txt              | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c
index 4a1455402650..9c08a2bfef02 100644
--- a/board/freescale/mpc837xerdb/mpc837xerdb.c
+++ b/board/freescale/mpc837xerdb/mpc837xerdb.c
@@ -146,7 +146,7 @@ int board_early_init_f(void)
 	/* we check only part num, and don't look for CPU revisions */
 	switch (PARTID_NO_E(spridr)) {
 	case SPR_8377:
-		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
+		fsl_setup_serdes(CFG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
 		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
@@ -156,7 +156,7 @@ int board_early_init_f(void)
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
 		break;
 	case SPR_8379:
-		fsl_setup_serdes(CONFIG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
+		fsl_setup_serdes(CFG_FSL_SERDES1, FSL_SERDES_PROTO_SATA,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
 		fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA,
 				 FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V);
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 9af76e830dc0..4a3db8dec0ed 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -153,7 +153,7 @@
 #define CFG_SYS_NS16550_COM2	(CONFIG_SYS_IMMR+0x4600)
 
 /* SERDES */
-#define CONFIG_FSL_SERDES1	0xe3000
+#define CFG_FSL_SERDES1	0xe3000
 #define CONFIG_FSL_SERDES2	0xe3100
 
 /* I2C */
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1093721dca5c..29d5b933b9df 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -45,7 +45,7 @@ CFG_FSL_PMIC_CLK
 CFG_FSL_PMIC_CS
 CFG_FSL_PMIC_MODE
 CFG_FSL_SDHC_V2_3
-CONFIG_FSL_SERDES1
+CFG_FSL_SERDES1
 CONFIG_FSL_SERDES2
 CONFIG_GATEWAYIP
 CONFIG_GMII
-- 
2.25.1