[PoC 089/241] global: Migrate CONFIG_L2_CACHE to CFG

[Tom Rini]

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 arch/powerpc/cpu/mpc85xx/cpu_init.c | 4 ++--
 arch/powerpc/cpu/mpc85xx/fdt.c      | 4 ++--
 arch/x86/cpu/intel_common/car2.S    | 2 +-
 include/configs/MPC8548CDS.h        | 2 +-
 include/configs/P1010RDB.h          | 2 +-
 include/configs/p1_p2_rdb_pc.h      | 2 +-
 include/configs/socrates.h          | 2 +-
 scripts/config_whitelist.txt        | 2 +-
 8 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index f07e8ab388e8..562d7074ed75 100644
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -515,7 +515,7 @@ int enable_cluster_l2(void)
 int l2cache_init(void)
 {
 	__maybe_unused u32 svr = get_svr();
-#ifdef CONFIG_L2_CACHE
+#ifdef CFG_L2_CACHE
 	ccsr_l2cache_t *l2cache = (void __iomem *)CFG_SYS_MPC85xx_L2_ADDR;
 #elif defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2) && defined(CONFIG_E6500)
 	struct ccsr_cluster_l2 * l2cache = (void __iomem *)CFG_SYS_FSL_CLUSTER_1_L2;
@@ -523,7 +523,7 @@ int l2cache_init(void)
 
 	puts ("L2:    ");
 
-#if defined(CONFIG_L2_CACHE)
+#if defined(CFG_L2_CACHE)
 	volatile uint cache_ctl;
 	uint ver;
 	u32 l2siz_field;
diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index a7e1df104d73..635eaed12152 100644
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -185,7 +185,7 @@ static inline void ft_fixup_l3cache(void *blob, int off)
 #define ft_fixup_l3cache(x, y)
 #endif
 
-#if defined(CONFIG_L2_CACHE) || \
+#if defined(CFG_L2_CACHE) || \
 	defined(CONFIG_BACKSIDE_L2_CACHE) || \
 	defined(CONFIG_SYS_FSL_QORIQ_CHASSIS2)
 static inline void ft_fixup_l2cache_compatible(void *blob, int off)
@@ -218,7 +218,7 @@ static inline void ft_fixup_l2cache_compatible(void *blob, int off)
 }
 #endif
 
-#if defined(CONFIG_L2_CACHE)
+#if defined(CFG_L2_CACHE)
 /* return size in kilobytes */
 static inline u32 l2cache_size(void)
 {
diff --git a/arch/x86/cpu/intel_common/car2.S b/arch/x86/cpu/intel_common/car2.S
index f8cf78586d02..908f2251b67a 100644
--- a/arch/x86/cpu/intel_common/car2.S
+++ b/arch/x86/cpu/intel_common/car2.S
@@ -246,7 +246,7 @@ car_cqos:
 	or	$(PREFETCH_L1_DISABLE | PREFETCH_L2_DISABLE), %eax
 	wrmsr
 
-#if (CONFIG_DCACHE_RAM_SIZE == CONFIG_L2_CACHE_SIZE)
+#if (CONFIG_DCACHE_RAM_SIZE == CFG_L2_CACHE_SIZE)
 /*
  * If CAR size is set to full L2 size, mask is calculated as all-zeros.
  * This is not supported by the CPU/uCode.
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index d2a70aa88f88..5f2fc5516d5e 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -20,7 +20,7 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_L2_CACHE			/* toggle L2 cache */
+#define CFG_L2_CACHE			/* toggle L2 cache */
 
 /*
  * Only possible on E500 Version 2 or newer cores.
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 67ee74ba6232..794289627fe8 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -99,7 +99,7 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_L2_CACHE			/* toggle L2 cache */
+#define CFG_L2_CACHE			/* toggle L2 cache */
 
 /* DDR Setup */
 #define SPD_EEPROM_ADDRESS		0x52
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index de6440a07564..c8ecd2dc0fca 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -112,7 +112,7 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_L2_CACHE
+#define CFG_L2_CACHE
 
 #define CFG_SYS_CCSRBAR		0xffe00000
 #define CFG_SYS_CCSRBAR_PHYS_LOW	CFG_SYS_CCSRBAR
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index fb2b76eb829a..9eee8de41644 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -40,7 +40,7 @@
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_L2_CACHE			/* toggle L2 cache		*/
+#define CFG_L2_CACHE			/* toggle L2 cache		*/
 
 #define CFG_SYS_INIT_DBCR DBCR_IDM		/* Enable Debug Exceptions	*/
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index ca45b1eeb514..07fd8dbeab11 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -97,7 +97,7 @@ CFG_KSNET_SERDES_LANES_PER_SGMII
 CFG_KSNET_SERDES_SGMII2_BASE
 CFG_KSNET_SERDES_SGMII_BASE
 CFG_L1_INIT_RAM
-CONFIG_L2_CACHE
+CFG_L2_CACHE
 CONFIG_LEGACY_BOOTCMD_ENV
 CONFIG_LOWPOWER_ADDR
 CONFIG_LOWPOWER_FLAG
-- 
2.25.1