[PoC 181/241] global: Migrate CONFIG_SH_ETHER_CACHE_WRITEBACK to CFG

[Tom Rini]

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 README                       | 2 +-
 drivers/net/sh_eth.c         | 2 +-
 include/configs/alt.h        | 2 +-
 include/configs/condor.h     | 2 +-
 include/configs/gose.h       | 2 +-
 include/configs/grpeach.h    | 2 +-
 include/configs/koelsch.h    | 2 +-
 include/configs/lager.h      | 2 +-
 include/configs/porter.h     | 2 +-
 include/configs/silk.h       | 2 +-
 include/configs/stout.h      | 2 +-
 scripts/config_whitelist.txt | 2 +-
 12 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/README b/README
index aa989f67e2c0..c35207cb2af5 100644
--- a/README
+++ b/README
@@ -553,7 +553,7 @@ The following options need to be configured:
 			CONFIG_SH_ETHER_PHY_ADDR
 			Define the ETH PHY's address
 
-			CONFIG_SH_ETHER_CACHE_WRITEBACK
+			CFG_SH_ETHER_CACHE_WRITEBACK
 			If this option is set, the driver enables cache flush.
 
 - TPM Support:
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 38049b380d7c..72fdf7ad89a1 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -39,7 +39,7 @@
 # error "Please define CONFIG_SH_ETHER_PHY_ADDR"
 #endif
 
-#if defined(CONFIG_SH_ETHER_CACHE_WRITEBACK) && \
+#if defined(CFG_SH_ETHER_CACHE_WRITEBACK) && \
 	!CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
 #define flush_cache_wback(addr, len)    \
 		flush_dcache_range((unsigned long)addr, \
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 940169b42043..93aee6b6a460 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -27,7 +27,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/include/configs/condor.h b/include/configs/condor.h
index fa3edef9b300..3f99cbf9dab9 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -17,7 +17,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/include/configs/gose.h b/include/configs/gose.h
index e54f4b24e048..45a537341b0e 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -23,7 +23,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 5ae17f70e909..3fde61407094 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -20,7 +20,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 1d8aa6def88f..b3b6f03e08d4 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -23,7 +23,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/include/configs/lager.h b/include/configs/lager.h
index bb8cc5fecb7a..16d15ccdd913 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -24,7 +24,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/include/configs/porter.h b/include/configs/porter.h
index 907cf29d0318..7a1d9d48a150 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -28,7 +28,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/include/configs/silk.h b/include/configs/silk.h
index 7361daa27c49..4edb1bc3c533 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -28,7 +28,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/include/configs/stout.h b/include/configs/stout.h
index b60e363b2c7c..0004fb454c1e 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -32,7 +32,7 @@
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
-#define CONFIG_SH_ETHER_CACHE_WRITEBACK
+#define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
 
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 8627d6a91aa6..bf1359f8df54 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -190,7 +190,7 @@ CFG_SETUP_INITRD_TAG
 CFG_SET_DFU_ALT_BUF_LEN
 CFG_SH_ETHER_ALIGNE_SIZE
 CFG_SH_ETHER_CACHE_INVALIDATE
-CONFIG_SH_ETHER_CACHE_WRITEBACK
+CFG_SH_ETHER_CACHE_WRITEBACK
 CONFIG_SH_ETHER_PHY_ADDR
 CONFIG_SH_ETHER_PHY_MODE
 CONFIG_SH_ETHER_USE_PORT
-- 
2.25.1