[PoC 150/241] global: Migrate CONFIG_PL01x_PORTS to CFG

[Tom Rini]

Signed-off-by: Tom Rini <trini at konsulko.com>
---
 README                            | 2 +-
 drivers/serial/serial_pl01x.c     | 2 +-
 include/configs/lx2160a_common.h  | 2 +-
 include/configs/mxs.h             | 2 +-
 include/configs/s5p4418_nanopi2.h | 2 +-
 include/configs/synquacer.h       | 2 +-
 include/configs/vexpress_common.h | 2 +-
 scripts/config_whitelist.txt      | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/README b/README
index 1eda285312be..3e5af3e204c3 100644
--- a/README
+++ b/README
@@ -424,7 +424,7 @@ The following options need to be configured:
 		If you have Amba PrimeCell PL011 UARTs, set this variable to
 		the clock speed of the UARTs.
 
-		CONFIG_PL01x_PORTS
+		CFG_PL01x_PORTS
 
 		If you have Amba PrimeCell PL010 or PL011 UARTs on your board,
 		define this to a list of base addresses for each (supported)
diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c
index dd2881931dfd..7449e9b90430 100644
--- a/drivers/serial/serial_pl01x.c
+++ b/drivers/serial/serial_pl01x.c
@@ -29,7 +29,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 #ifndef CONFIG_DM_SERIAL
 
-static volatile unsigned char *const port[] = CONFIG_PL01x_PORTS;
+static volatile unsigned char *const port[] = CFG_PL01x_PORTS;
 static enum pl01x_type pl01x_type __section(".data");
 static struct pl01x_regs *base_regs __section(".data");
 #define NUM_PORTS (sizeof(port)/sizeof(port[0]))
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index ea59f772064a..dea14f28828d 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -47,7 +47,7 @@
 #define CFG_SYS_SERIAL2		0x21e0000
 #define CFG_SYS_SERIAL3		0x21f0000
 /*below might needs to be removed*/
-#define CONFIG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
+#define CFG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
 					(void *)CFG_SYS_SERIAL1, \
 					(void *)CFG_SYS_SERIAL2, \
 					(void *)CFG_SYS_SERIAL3 }
diff --git a/include/configs/mxs.h b/include/configs/mxs.h
index 212d2201e7cc..17b4295d2d6d 100644
--- a/include/configs/mxs.h
+++ b/include/configs/mxs.h
@@ -78,7 +78,7 @@
  * Conflicts with AUART driver which can be set by board.
  */
 #define CFG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
+#define CFG_PL01x_PORTS		{ (void *)MXS_UARTDBG_BASE }
 /* Default baudrate can be overridden by board! */
 
 /* NAND */
diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h
index c9cef6a77c62..c192d733c1db 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -79,7 +79,7 @@
  * serial console configuration
  */
 #define CFG_PL011_CLOCK		50000000
-#define CONFIG_PL01x_PORTS		{(void *)PHY_BASEADDR_UART0, \
+#define CFG_PL01x_PORTS		{(void *)PHY_BASEADDR_UART0, \
 					 (void *)PHY_BASEADDR_UART1, \
 					 (void *)PHY_BASEADDR_UART2, \
 					 (void *)PHY_BASEADDR_UART3}
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index d0b56cb48f7d..be606ce2955b 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -33,7 +33,7 @@
 /* Serial (pl011)       */
 #define UART_CLK			(62500000)
 #define CFG_PL011_CLOCK		UART_CLK
-#define CONFIG_PL01x_PORTS		{(void *)(0x2a400000)}
+#define CFG_PL01x_PORTS		{(void *)(0x2a400000)}
 
 /* Support MTD */
 #define CFG_SYS_FLASH_BASE		(0x08000000)
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index 3fc70de57713..ba7731bfca6b 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -117,7 +117,7 @@
 
 /* PL011 Serial Configuration */
 #define CFG_PL011_CLOCK		24000000
-#define CONFIG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
+#define CFG_PL01x_PORTS		{(void *)CFG_SYS_SERIAL0, \
 					 (void *)CFG_SYS_SERIAL1}
 
 #define CFG_SYS_SERIAL0		V2M_UART0
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 0ea10f2edb32..390299fa0a8f 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -159,7 +159,7 @@ CFG_PHY_ID
 CFG_PHY_INTERFACE_MODE
 CFG_PHY_IRAM_BASE
 CFG_PL011_CLOCK
-CONFIG_PL01x_PORTS
+CFG_PL01x_PORTS
 CONFIG_PME_PLAT_CLK_DIV
 CONFIG_POST
 CONFIG_POSTBOOTMENU
-- 
2.25.1