[PATCH] SPI: GD SPI: added Gigadevice part #s in the ids.c file

Fabio Estevam festevam at gmail.com
Tue Nov 22 01:50:31 CET 2022


On Mon, Nov 21, 2022 at 9:04 PM Victor Lim <victorswlim at gmail.com> wrote:
>
> Updated the ids.c file with Gigadevice SPI NOR part #s.

What exactly was updated? Please describe it here.

> Signed-Off-by: Victor Lim <vlim at gigadevice.com>
> ---
>  drivers/mtd/spi/spi-nor-ids.c | 137 +++++++++++++++++++++++-----------
>  1 file changed, 92 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index 74e93d6209..662628b739 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -87,51 +87,98 @@ const struct flash_info spi_nor_ids[] = {
>         { INFO("en25s64",    0x1c3817, 0, 64 * 1024,  128, SECT_4K) },
>  #endif
>  #ifdef CONFIG_SPI_FLASH_GIGADEVICE     /* GIGADEVICE */
> -       /* GigaDevice */
> -       {
> -               INFO("gd25q16", 0xc84015, 0, 64 * 1024,  32,
> -                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> -                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> -       },
> -       {
> -               INFO("gd25q32", 0xc84016, 0, 64 * 1024,  64,
> -                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> -                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> -       },
> -       {
> -               INFO("gd25lq32", 0xc86016, 0, 64 * 1024, 64,
> -                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> -                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> -       },
> -       {
> -               INFO("gd25q64", 0xc84017, 0, 64 * 1024, 128,
> -                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> -                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> -       },
> -       {
> -               INFO("gd25lq64c", 0xc86017, 0, 64 * 1024, 128,
> -                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> -                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> -       },
> -       {
> -               INFO("gd25q128", 0xc84018, 0, 64 * 1024, 256,
> -                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> -                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> -       },
> -       {
> -               INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
> -                       SECT_4K | SPI_NOR_DUAL_READ |
> -                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> -       },
> -       {
> -               INFO("gd25lq256d", 0xc86019, 0, 64 * 1024, 512,
> -                       SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
> -                       SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
> -       },
> -       {
> -               INFO("gd25lx256e", 0xc86819, 0, 64 * 1024, 512,
> -                    SECT_4K | SPI_NOR_OCTAL_READ | SPI_NOR_4B_OPCODES)
> -       },
> +/* GigaDevice - GD25Q or B series  */
> +       {INFO("gd25q16", 0xc84015, 0, 64 * 1024,  32,   SECT_4K |
> +       SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)},
> +       {INFO("gd25q32", 0xc84016, 0, 64 * 1024,  64,   SECT_4K |

You are changing the format here, which makes it hard to review.


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