[PATCH] arm64: zynqmp: Describe TI phy as ethernet-phy-id with reset on zcu106
Michal Simek
monstr at monstr.eu
Tue Nov 22 12:07:56 CET 2022
st 16. 11. 2022 v 11:59 odesílatel Michal Simek <michal.simek at amd.com> napsal:
>
> zcu106 also connects ethernet phy reset via tca6416 chip as is done on
> other evaluation boards. That's why describe this connection to make sure
> that ethernet phy is reset before it's use.
>
> Signed-off-by: Michal Simek <michal.simek at amd.com>
> ---
>
> arch/arm/dts/zynqmp-zcu106-revA.dts | 19 +++++++++++++------
> 1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts
> index 3e137676feb6..4858b4d1f5e9 100644
> --- a/arch/arm/dts/zynqmp-zcu106-revA.dts
> +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts
> @@ -200,12 +200,19 @@
> phy-mode = "rgmii-id";
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_gem3_default>;
> - phy0: ethernet-phy at c {
> - reg = <0xc>;
> - ti,rx-internal-delay = <0x8>;
> - ti,tx-internal-delay = <0xa>;
> - ti,fifo-depth = <0x1>;
> - ti,dp83867-rxctrl-strap-quirk;
> + mdio: mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + phy0: ethernet-phy at c {
> + #phy-cells = <1>;
> + reg = <0xc>;
> + compatible = "ethernet-phy-id2000.a231";
> + ti,rx-internal-delay = <0x8>;
> + ti,tx-internal-delay = <0xa>;
> + ti,fifo-depth = <0x1>;
> + ti,dp83867-rxctrl-strap-quirk;
> + reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
> + };
> };
> };
>
> --
> 2.36.1
>
Applied.
M
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs
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