[PATCH 2/2] drivers: watchdog: Enhance watchdog support in SPL for N5X
Jit Loon Lim
jit.loon.lim at intel.com
Tue Nov 22 15:18:37 CET 2022
From: Siew Chin Lim <elly.siew.chin.lim at intel.com>
Enable watchdog before initializing other component (example: DDR).
Thus, watchdog need to be fully executed in onchip ram.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim at intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim at intel.com>
---
arch/arm/mach-socfpga/spl_n5x.c | 17 ++++++++++-------
1 file changed, 10 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-socfpga/spl_n5x.c b/arch/arm/mach-socfpga/spl_n5x.c
index d056871d29..c56b5a1b88 100644
--- a/arch/arm/mach-socfpga/spl_n5x.c
+++ b/arch/arm/mach-socfpga/spl_n5x.c
@@ -21,6 +21,8 @@
#include <init.h>
#include <spl.h>
#include <watchdog.h>
+#include <asm/arch/smmu_s10.h>
+#include <wdt.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -39,13 +41,6 @@ void board_init_f(ulong dummy)
writel(SYSMGR_WDDBG_PAUSE_ALL_CPU,
socfpga_get_sysmgr_addr() + SYSMGR_SOC64_WDDBG);
-#ifdef CONFIG_HW_WATCHDOG
- /* Enable watchdog before initializing the HW */
- socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1);
- socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
- hw_watchdog_init();
-#endif
-
/* ensure all processors are not released prior Linux boot */
writeq(0, CPU_RELEASE_ADDR);
@@ -67,6 +62,14 @@ void board_init_f(ulong dummy)
hang();
}
+ /*
+ * Enable watchdog as early as possible before initializing other
+ * component. Watchdog need to be enabled after clock driver because
+ * it will retrieve the clock frequency from clock driver.
+ */
+ if (CONFIG_IS_ENABLED(WDT))
+ initr_watchdog();
+
print_reset_info();
cm_print_clock_quick_summary();
--
2.26.2
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