[PATCH v2] spi: zynqmp_gqspi: Update tapdelay value
Ashok Reddy Soma
ashok.reddy.soma at amd.com
Wed Nov 23 10:04:51 CET 2022
From: T Karthik Reddy <t.karthik.reddy at xilinx.com>
The driver was using an incorrect value for GQSPI_LPBK_DLY_ADJ_DLY_1
tapdelay for Versal for frequencies above 100MHz. Change it from 2 to 1
based on the recommended value in IP spec.
Signed-off-by: T Karthik Reddy <t.karthik.reddy at xilinx.com>
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma at amd.com>
---
Changes in v2:
- Updated description to explain why MACRO value is changed.
drivers/spi/zynqmp_gqspi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/spi/zynqmp_gqspi.c b/drivers/spi/zynqmp_gqspi.c
index 48eff777df..83a5c8aebf 100644
--- a/drivers/spi/zynqmp_gqspi.c
+++ b/drivers/spi/zynqmp_gqspi.c
@@ -94,7 +94,7 @@
#define GQSPI_BAUD_DIV_SHIFT 2
#define GQSPI_LPBK_DLY_ADJ_LPBK_SHIFT 5
-#define GQSPI_LPBK_DLY_ADJ_DLY_1 0x2
+#define GQSPI_LPBK_DLY_ADJ_DLY_1 0x1
#define GQSPI_LPBK_DLY_ADJ_DLY_1_SHIFT 3
#define GQSPI_LPBK_DLY_ADJ_DLY_0 0x3
#define GQSPI_USE_DATA_DLY 0x1
--
2.17.1
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