[PATCH V3 2/2] spi: cadence_qspi: use STIG mode for small reads

[Vaishnav Achath]

On 25/11/22 11:29, Dhruva Gole wrote:
> Fix the issue where some flash chips like cypress S25HS256T return the
> value of the same register over and over in DAC mode.
> 
> For example in the TI K3-AM62x Processors refer [0] Technical Reference
> Manual there is a layer of digital logic in front of the QSPI/OSPI
> Drive when used in DAC mode. This is part of the Flash Subsystem (FSS)
> which provides access to external Flash devices. This operates by
> default in a 32 bit mode causing it to always align all data to 4 bytes
> from a 4byte aligned address. In some flash chips like cypress for
> example if we try to read some regs in DAC mode then it keeps sending the
> value of the first register that was requested and inorder to read the
> next reg, we have to stop and re-initiate a new transaction.
> 
> This causes wrong registers values to be read than what is desired when
> registers are read in DAC mode. Hence if the data.nbytes is very less
> then prefer STIG mode for such small reads.
> 
> [0] https://www.ti.com/lit/ug/spruiv7a/spruiv7a.pdf
> 
> Signed-off-by: Dhruva Gole <d-gole at ti.com>
> ---
>  drivers/spi/cadence_qspi.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
> index ab0a681c8376..5506f63ef078 100644
> --- a/drivers/spi/cadence_qspi.c
> +++ b/drivers/spi/cadence_qspi.c
> @@ -307,7 +307,13 @@ static int cadence_spi_mem_exec_op(struct spi_slave *spi,
>  				    priv->is_decoded_cs);
>  
>  	if (op->data.dir == SPI_MEM_DATA_IN && op->data.buf.in) {
> -		if (!op->addr.nbytes)
> +	/*
> +	 * Performing reads in DAC mode forces to read minimum 4 bytes
> +	 * which is unsupported on some flash devices during register
> +	 * reads, prefer STIG mode for such small reads.
> +	 */
> +		if (!op->addr.nbytes ||
> +		    op->data.nbytes < CQSPI_STIG_DATA_LEN_MAX)
>  			mode = CQSPI_STIG_READ;

For the series,

Tested-by: Vaishnav Achath <vaishnav.a at ti.com>

Erase-Write-Read back tested on s28hs512t, mt35xu512aba, mt25qu512a on J7200 and
J721E platforms.

>  		else
>  			mode = CQSPI_READ;

-- 
Regards,
Vaishnav